Work

Strix: Re-thinking NPU Reliability from a System Perspective

Year: 2026

Type: preprint

Abstract: DNNs and LLMs increasingly rely on hardware accelerators, including in safety-critical domains, while technology scaling and growing model complexity make hardware faults more frequent. Existing system-level mechanisms typically treat the NPU as a monolithic unit, using coarse-grained replication that incurs prohibitive performance and hardware overheads, leaving a gap between reliability requirements and deployable solutions. To bridge this gap, we present Strix, a full-stack NPU reliability framework on an open-source SoC, spanning micro-architecture, ISA, and programming methods. Strix re-partitions the NPU along the system inference pipeline, identifies dominant failure modes, and attaches targeted safeguards, achieving sub-micro-second fault localisation, error detection, and correction with only 1.04$\times$ slowdown and minimal hardware overhead.

Source: arXiv (Cornell University)

DOI: 10.48550/arxiv.2604.10484

Authors: Guan, Jiapeng, Zhang, Jie, Zhou, Hao, Wei, Ran, You, Dean, Wang, Hui, Wang, Yingquan, Wang, Tinglue, Zhao, Xudong, Li, Jing, Jiang, Zhe

Institutions: Dalian University of Technology, Southeast University, Lancaster University, New Jersey Institute of Technology

Topic: Distributed systems and fault tolerance

Subfield: Computer Networks and Communications

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

Funders: National Science Foundation, National Key Research and Development Program of China, Fundamental Research Funds for the Central Universities

Awards: CAREER: Towards Safety-Critical Real-Time Systems with Learning Components, G3398973583

OpenAlex ID: W7154244252

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