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Emulation and Mitigation of Multiple Bit Upset in SRAM Memories Using Interleaved Counter Matrix Code

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Year: 2026
Type: article
Source: Journal of Circuits Systems and Computers
DOI: 10.1142/s0218126626502245
Authors: M. Shunmugathammal, Anusha Gorantla, R. Dinesh, N. Muthukumaran, P. Deepa, A. Ahilan, T. V. Sindhu
Institutions: SRM Institute of Science and Technology, HKBK College of Engineering, Sri Eshwar College of Engineering, Government of Tamil Nadu, Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology
Language: English

Topic: Radiation Effects in Electronics
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences

Open Access status: closed
OpenAlex ID: W7155168310
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Cites: 19
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