Adaptive Power–Time Coupled Synchronization for DC-Bus Ripple Suppression in Single-Phase AC–DC–AC Voltage Regulators
Year: 2026
Type: article
Abstract: The inherent second-order power oscillation of the single-phase AC-DC-AC voltage regulator under wide input voltage conditions will cause significant ripple in the DC bus voltage, especially when the load changes suddenly. The traditional synchronous method based on phase-locked loop (PLL) only focuses on phase tracking and does not consider the direct impact of the synchronous timing on the DC bus ripple. This paper reveals that the timing mismatch between the grid voltage and the zero-crossing point of the inverter output voltage is the key factor determining the amplitude of the DC bus ripple, clarifies the intrinsic mechanism of power-time coupling, and establishes the analytical relationship between second-order power mismatch, timing deviation and bus ripple. Based on this, a power-time coupling adaptive synchronization method is proposed, which takes the synchronization timing as a controllable variable, extracts the second-order voltage ripple of the DC bus and introduces a slow adaptive compensation loop. The timing deviation at the zero-crossing point is adjusted without changing the internal structure of the PLL. Through the experimental prototype of the single-phase AC-DC-AC voltage regulator, it is verified that the proposed method can effectively suppress the DC bus voltage ripple under wide input voltage and dynamic load switching. Compared with the traditional PLL synchronization and fixed timing compensation methods, it has better steady-state and transient performance, and maintains a stable output voltage, demonstrating engineering practicability.
Authors: Da Xie, Miao Huang, Jinkun Li
Institution: Shanghai University of Electric Power
Language: English
Subfield: Control and Systems Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,075
Award: G2921520888
OpenAlex ID: W7160836875