Block Processing based 2-D FIR filter Realization Structures using Distributed Arithmetic
Year: 2026
Type: article
Abstract: This paper presents a new structure for 2-D FIR Filter using distributed arithmetic (DA) technique. Inthis paper, block processing is used to enhance the throughput of the structure. In the proposed structure,instead of using look up tables (LUT) for storing the partial sum, basic combinational structure is usedfor generating the partial sum for the corresponding filter coefficients. Furthermore, the complexity ofcombinational structure is also reduced by using enhanced compressor adder. The higher order filterimplementation is done by parallel dividing the higher order filter into smaller order. In the proposedstructure the critical path delay is reduced by adding one stage pipelining. The ASIC synthesis results ofthe proposed block based 2-D FIR Filter reveals the significant improvement in performance parameters.In particular, for order 8 the proposed filter structure 1 offers 63.69% improvement in area, 48.55%improvement in data arrival time, 81.79% improvement in power, 81.32% improvement in area delayproduct (ADP), 86.99% improvement in energy per output (EPO) and 94.35% improvement inthroughput as compared with the existing structure.
Institution: Motilal Nehru National Institute of Technology
Language: English
Subfield: Signal Processing
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7204482259
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