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Phasor estimation using enriched side-lobe suppressor-based three-point interpolated DFT technique

Year: 2026

Type: article

Source: COMPEL The International Journal for Computation and Mathematics in Electrical and Electronic Engineering

DOI: 10.1108/compel-03-2026-0160

Authors: Sweta Prasad, Senthil Kumar Murugan

Institution: National Institute of Technology Patna

Language: English

Topic: Advanced Electrical Measurement Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W7210278544

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Cites: 27

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