A Dual-Core dsPIC 20 kHz Current Loop for a DC Servomechanism: Floating-Point Versus Q15 Fixed-Point Implementation
Year: 2026
Type: article
Abstract: This work presents a dual-core embedded architecture for inner–outer loop control of a brushed DC servomechanism based on a dsPIC33CH128MP202 digital signal controller. The secondary core executes the PWM-synchronized current loop at 20 kHz and computes online performance and timing statistics, while the main core handles the incremental encoder, host communication, and inter-core data exchange. Three control schemes are evaluated on the same plant over five runs: direct PWM, a floating-point proportional-integral (PI) current controller, and the same discrete PI law in Q15 fixed-point arithmetic. The maximum observed loop execution times were 9.17 µs, 31.74 µs, and 10.50 µs, respectively, within the 50 µs sampling period. Independent oscilloscope measurements produced 9.19, 30.45, and 10.50 µs. Q15 reduced the maximum execution time by 66.9% and increased the timing margin from 18.26 to 39.50 µs. The two PI implementations showed no observable difference in position response and nearly identical steady-state current-loop RMSE values. The measurements show that Q15 implementation recovers substantial current-loop timing margin without measurable degradation in closed-loop performance, while also confirming the expected reduction in computational cost of fixed-point arithmetic. Current-reference tests from ±0.25 to ±1.00 A and emulated additional inertias were added for both PI implementations to examine current-loop accuracy and load sensitivity.
Source: Electronics
Author: Alberto Soria-López
Language: English
Subfield: Control and Systems Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
OpenAlex ID: W7212062112