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Voltage-Increment-Based Low-Rank Representation with Polynomial Chaos Expansions for Probabilistic Voltage Assessment Under Multiple Contingencies

Year: 2026
Type: article
Abstract: Probabilistic voltage assessment under multiple contingencies involves numerous network topologies and uncertain operating conditions, resulting in substantial surrogate modeling and computational costs. To address this problem, this paper proposes a voltage-increment-based low-rank (LR) representation with polynomial chaos expansion (PCE), denoted as LR-PCE-ΔV, for a unified multi-contingency voltage assessment. For each model-construction realization, the voltage increment ΔV is calculated as the difference between the post-contingency and pre-contingency bus voltages. The voltage increments under all contingencies are then stacked to form a joint multi-contingency voltage-increment response matrix. Singular value decomposition (SVD) is applied to extract the dominant modes, and one PCE surrogate is constructed for the coefficient of each retained mode. For a new input realization, the predicted modal coefficients are used to reconstruct the voltage increments under all contingencies, after which the corresponding pre-contingency voltages are added to recover the post-contingency voltages. The method is verified on the IEEE 118-bus system with 231 N − 1 contingencies against conventional Monte Carlo simulation (MCS), comprising the pre-contingency AC optimal power flow (ACOPF) and post-contingency AC power flow calculations (ACPF). The proposed method reduces the number of required PCE surrogates from 231 to 21. Compared with the corresponding low-rank model constructed directly from the post-contingency voltages, it reduces the RMSE by 85.9% and achieves a 7.7-fold speedup over conventional MCS while accurately reproducing voltage distributions.
Source: Mathematics
Language: English
Open Access status: gold
Estimated APC paid: $3,137
OpenAlex ID: W7215979264
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Cites: 31
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Related to: 10