Effects of Secondary-Epitaxial Parameters on the Electrical Characteristics of a 10 kV 4H-SiC Planar MOSFET
Year: 2026
Type: article
Abstract: Current crowding in the JFET region is an important contributor to the on-resistance of 10 kV 4H-SiC planar MOSFETs. This work investigates a device incorporating a uniformly doped n-type current-spreading layer formed by secondary epitaxy. A two-dimensional half-cell model is established in TCAD. The JFET width is first evaluated in terms of specific on-resistance, breakdown voltage, and peak gate-oxide electric field. The thickness and doping concentration of the secondary-epitaxial CSL are then varied to examine their effects on static characteristics, gate–drain capacitance, gate charge, and third-quadrant conduction. Increasing either CSL thickness or doping concentration improves electron spreading beneath the JFET region and reduces conduction loss. These benefits are accompanied by a lower breakdown voltage, a higher peak oxide field, and larger gate–drain capacitance and Miller charge. Under negative gate bias, a thicker or more heavily doped CSL also increases the reverse-conduction voltage drop. Based on the static tradeoff among Ron,sp, BV, and Eox,max, a parameter combination of WJFET = 1.5 μm, TCSL = 1.5 μm, and NCSL = 2 × 1016 cm−3 is selected as a representative design. The effects of the CSL parameters on gate-drive-related and third-quadrant characteristics are further evaluated.
Source: Electronics
Institutions: China Southern Power Grid (China), Chongqing University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
OpenAlex ID: W7221180531