Work

Drastic Improvement in Carrier Lifetime (>50 ms) and Stability of Poly‐Si‐Passivated n‐Type Cz‐Si Wafers by a Simple Belt‐Line Furnace Annealing Step

Year: 2026

Type: article

Abstract: We examine the stability of the carrier lifetime of n‐type Cz‐Si wafers with symmetrical n + ‐poly‐Si layers on silicon oxide passivation. Such layers are used in today’s standard industrial TOPCon solar cells and probably in next‐generation IBC cells. Firing in an industrial belt‐line firing furnace reduced our samples’ carrier lifetime. Furthermore, the otherwise stable samples show a degradation in lifetime by heating to 75 °C and simultaneous illumination of 0.15 suns. This degradation proceeds in two steps: first, the bulk lifetime degrades due to hydrogen introduction into the bulk during firing. Second, after the LeTID‐specific recovery of the bulk, the surface passivation starts to degrade. The necessity of the firing step for this surface‐related degradation indicates that hydrogen introduction plays an important role as well. Importantly, both degradation effects can be completely reversed by applying a low‐temperature annealing step (400–500 °C) on a hot‐plate. Moreover, annealing directly after firing does not only suppresses degradation but also reverses the initial lifetime reduction through the firing itself resulting in high lifetimes and vanishing surface recombination. Transferring to an industrial belt‐line furnace led to stable lifetimes exceeding 50 ms and implied open‐circuit voltages of iV oc = 748 mV by an industrially applicable process.

Source: Solar RRL

DOI: 10.1002/solr.70511

Authors: Daniel Beck, Michael Winter, Jan Schmidt

Institutions: Leibniz University Hannover, Institut für Solarenergieforschung

Language: English

Topic: Silicon and Solar Cell Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Affordable and clean energy

Open Access status: hybrid

Estimated APC paid: $4,640