System-Level Voltage Ripple Analysis Based on Practical IC Current Modeling
Year: 2026
Type: conference-paper
Abstract: Modeling the current drawn by the IC is a critical factor in determining the accuracy of system-level voltage ripple. A full chip is composed of multiple blocks with different switching current profiles, which makes current modeling challenging. In this paper, a practical current modeling approach combining the current profiles from each block is proposed. Subsequently, chip-package-board simulations were conducted using the extracted current model to calculate the system-level voltage ripple. For validation, the simulated voltage ripple was compared with the measured results in terms of overshoot, undershoot, and peak-to-peak values, demonstrating good correlation. Based on this methodology, the voltage ripple of the power plane for a commercial TV system was analyzed. Then the optimization for voltage ripple was performed during the design phase. As a result, the peak-to-peak value was reduced by 32%, which brings it within the 10% tolerance and meets the system requirements. The proposed highly accurate voltage ripple simulation enables the minimization of ripple during the design phase in advance to avoid trial-and-error effort, reducing development time and cost.
Authors: Yuna Kim, Tai Sik Yang, Yong Seok Kang
Institutions: LG (United States), LG (South Korea)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W7222998931