Work

Impact of different SiC substrate technologies on the Power Cycling Capability of SiC-MOSFETs

Year: 2026

Type: conference-paper

Abstract: This paper investigates the power cycling capability of SiC MOSFETs fabricated on SmartSiCTM engineered (Mono+Poly SiC) substrates under two different temperature swings of 110 K and 150 K. The results are compared to devices based on a conventional monocrystalline (Mono-SiC) substrate, while identical assembly and interconnection technologies are maintained. The observed failure mode was a 5% increase in the forward voltage drop (VDS) for all samples due to a degradation of the Die Top System (DTS). However, there is a noticeable trend that the normalized power cycling lifetime is higher when using an engineered substrate instead of a Mono-SiC substrate. In addition, Ansys simulations revealed a reduction in plastic strain using the engineered substrate technology. This effect was observed for both, the aluminium and silver sintering layers within the DTS.

Source: Zenodo (CERN European Organization for Nuclear Research)

DOI: 10.5281/zenodo.23501909

Authors: Heimler, Patrick, Xie, Dong, Alaluss, Mohamed, Guiot, Eric, Lutz, Josef, Basler, Thomas

Institutions: Chemnitz University of Technology, Soitec (France)

Language: English

Topic: Silicon Carbide Semiconductor Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDGs: Affordable and clean energy, Industry, innovation and infrastructure

Open Access status: green

Funder: European Commission