RSCM-Net: FPGA-Aware Co-Design of Quantized DNNs with Reconfigurable Single Constant Multipliers
Type: conference-paper
Abstract: Low-bitwidth quantization reduces the memory footprint and arithmetic cost of deep neural network (DNN) inference, but conventional integer quantization relies on generic multipliers that are not necessarily optimal for FPGA fabrics. An alternative is to use Reconfigurable Single Constant Multipliers (RSCMs), which use shifts, additions/subtractions, and multiplexers to implement multiplication by a predefined set of quantized weights, chosen for its efficient FPGA mapping. This work introduces RSCM-Net, a hardware-aware co-design approach that generates such RSCM coefficient sets and trains the network on them. The coefficient set plays a dual role: it is a non-uniform weight codebook for quantization while also defining the constants supported by the multiplier hardware. RSCM-Net generates these codebooks under explicit FPGA implementation constraints, then uses an RSCM-aware quantizer to train DNNs with the resulting non-uniform levels. Across ResNet and MobileNet benchmarks on CIFAR-100 and ImageNet-1K, RSCM-Net matches and sometimes outperforms state-of-the-art fixed-point quantization, while reducing the LUT cost of the multipliers by up to 38%.
Source: HAL
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7223195636