Year: 2026
Type: article
Abstract: We developed a novel etchant designed to suppress Si (111) facet formation while maintaining a high etch rate for Si (100) surfaces. Screening of additive candidates was performed using bare silicon substrates and etch rates of different crystal planes were evaluated. As a result, one specific formulation (FORM B) was found to achieve both suppression of Si (111) facet formation and a high etch rate for Si (100). Further investigations revealed that the dissolution rate of each plane exhibited different sensitivity to the amount of additive B. This is attributed to differences in surface reaction site density and the selective adsorption behavior of the additive. The optimized etchant also showed good compatibility with patterned Si/SiGe substrates, suppressing facet formation similarly to bare Si substrates. These results indicate that the developed etchant is a promising candidate for advanced 3D DRAM processes.
DOI: 10.4028/p-g3sn2l
Institution: IMEC
Language: English
Topic: 3D IC and TSV technologies
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W7224490126