Hardware Implementation of the Opposite-Side Clamping Modulation and Gate-Drive Control for a 3-Level-ANPC Si/SiC Hybrid Converter
Year: 2026
Type: conference-paper
Abstract: Three-level active neutral point clamped converters (3L-ANPC) provide improved output voltage quality. However, the large number of switching states and neutral current paths significantly complicates safe gate-drive control without operating the semiconductors outside the specifications. This paper presents a modulation strategy for a hybrid 3L-ANPC phase leg employing SiC MOSFETs as inner high-frequency switches and Si IGBTs as outer blocking devices. All 64 switching states are systematically classified, safe turn-on and turn-off rules with defined locking times are derived, and three gate-control strategies are comparatively evaluated. Opposite-side clamping is selected to minimize the semiconductor losses of the hybrid 3L-ANPC topology. Based on this strategy, detailed commutation sequences especially for zero-crossings are developed and analyzed to prevent overvoltages and short-circuit conditions. The resulting modulation and gate-drive control are implemented on an AMD Artix-7 FPGA using carrier-based 3L-SVPWM with zero-sequence injection. Experimental measurements on an Infineon hybrid 3L-ANPC module up to 800 V DC link voltage confirm fault-free commutation, the absence of critical overvoltages, enabling safe and efficient real-time operation of hybrid 3L-ANPC converters.
Institution: Karlsruhe Institute of Technology
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W7224911249