Correctness Before Reuse: A CPU Contract Pilot for Kernel Optimization Memory
Year: 2026
Type: preprint
Abstract: A kernel that returns a plausible value on its first input may fail when runtime values, specialization parameters, layout, or a partial tile changes. We report a completed CPU validation pilot for such reuse boundaries. A frozen registry of eight host implementations is evaluated on 192 cases across addition, masked row softmax, and RMSNorm, producing 1,536 candidate-case checks. The suite contains 128 nonempty cases and 64 empty-shape contract checks. A host reference and a complete dispatch-metadata key pass all cases. Five of six seeded fault controls pass a benign first-input gate, yet every fault control fails at least one stronger check. Shape-only specialization passes 48/192, cached outputs 128/192, dropped tail rows 102/192, input mutation 160/192, a float16 shortcut 133/192, and naive float32 reduction 188/192. A separate 50-digit Decimal implementation verifies all target arrays within the frozen tolerance, replays all candidate checks, and confirms 40 nonempty input/oracle identities. These results establish an auditable validation artifact, not kernel speedup or learned optimization. The memory stores dispatch metadata rather than compiled code. A separate, uncompiled NKI entrypoint documents the next target-device stage. Future work applies the gate to actual Trainium compilation, profiling, generated candidates, and transfer across workload families under bounded credits.
Source: Preprints.org
Author: Saurav K. Aryal
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7225146353