Low Thermal Damage Laser Lift-off (LLO) Enabling Multi-Cycle Carrier Wafers Reuse for Advanced Packaging
Year: 2026
Type: article
Abstract: Fusion and hybrid bonding are becoming critical enablers in advanced packaging for die-to-wafer (D2W), high-bandwidth memory (HBM), and artificial intelligence (AI) applications. Laser lift-off (LLO) employing short-pulsed IR laser beam provides a clean and efficient method to release permanently bonded Si carrier wafers without need of a glue layer or backside grinding processes. LLO enables multiple carrier wafer reuse cycles, offering significant cost reduction and environmental sustainability benefits. However, LLO may generate the thermal and mechanical stresses during LLO to impact device integrity. This study investigates thermal damage mechanisms and mitigation strategies for stacked structures during carrier wafer release. Metal silicide phase transitions were characterized by X-ray diffraction (XRD) to detect thermal exposure 200–500 °C, while tracer ion diffusion analysis via time-of-flight secondary ion mass spectrometry (ToF-SIMS) identified thermal exposures in the 800–1000 °C range. These results were calibrated against 60-second rapid thermal annealing (RTA) references to establish a thermal budget for LLO induced energy exposure. The results of these thermal damage experiments were used to model a broader spectrum of stacked materials. The absorption through the stack and the resulting heat transfer were simulated. Since experimental measurements generally require orders of magnitude for longer timescales than laser exposure, it is challenging to compare the energy spike in LLO simulation to a thermal budget based on RTA processing. If for a given stack it has been demonstrated experimentally that the heat energy from the laser is at an acceptable level, then it is reasonable to assume that other stacks that show equal or less heat energy in simulation are also acceptable. This integrated experimental–simulation framework supports optimized stack engineering, ensuring device integrity and sustainable multi-cycle carrier wafer reuse for advanced packaging.
Source: IMAPSource Proceedings
DOI: 10.4071/001c.173632
Institutions: Tokyo Electron (Japan), Tokyo Electron Kyushu Ltd (Japan)
Language: English
Topic: 3D IC and TSV technologies
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W7225333248