Exploring Semiconductor Wafer Faults With Machine Learning
Year: 2026
Type: preprint
Abstract: Wafer map failure pattern identification and analysis is essential to semiconductor production in order to reduce defaults and expenses and boost productivity. The K-nearest neighbor approach and logistic regression models have been investigated in this study to examine wafer fault defect maps from the 811,457 genuine wafer maps in the WM-811K dataset available on Kaggle. We discover that only roughly 3.1% of the 811,457 wafers (25,519) have one of the eight fault labels, and that group is very unbalanced. There are only 149 instances of Near-full, compared to 37.9% of Edge-Ring. This disparity influenced the models' behavior as well as how they were assessed. The classifier achieved an overall accuracy of 76.68% using the mean pixel value of each wafer map as the input feature. Depending on the type of problem, performance varied greatly. Reliability in identifying well-defined, high-volume patterns was demonstrated by Edge-Ring's F1-score of 0.95 and Center's 0.88. With Scratch at 0.32 and Loc at 0.50, spatially complicated or sparse flaws were considerably more difficult. Due to its short test set of just 30 samples, the uncommon Near-full class demonstrated good recall (0.80) but low precision (0.36).
Source: ECSarXiv (OSF Preprints)
DOI: 10.1149/osf.io/y6rcs
Author: Kiaan Desai
Language: English
Subfield: Industrial and Manufacturing Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7225734980
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