Author

Yasunobu Aoki

Observed name: Y. Aoki

Institution: Renesas Electronics (Japan)

Observed institutions: NEC (Japan), Renesas Electronics (Japan)

OpenAlex ID: A5000336180

1981 · K. Fujii, Y. Torimaru, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 11

A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications

2019 · Ken Matsubara, Tsutomu Nagasawa, et al. · Symposium on VLSI Circuits · 4

A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier

2021 · Masaya Nakano, Yoshinobu Kaneda, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 3

A 2T-MONOS Embedded Flash Macro With 65-nm SOTB Technology Achieving 0.15-pJ/bit Read Energy With 80-MHz Access for IoT Applications

2020 · Ken Matsubara, Tsutomu Nagasawa, et al. · IEEE Solid-State Circuits Letters · 3

Fundamental Study on Optimum Design of Microgrid for Distributed Generation

2011 · 禎秀富永, 肇村上, et al. · Institutional Repositories DataBase (IRDB)

PDF

A 0.13 μm full metal embedded DRAM technology targeting on 1.2 V, 450 MHz operation

2002 · S. Arai, T. Sakoh, et al. · Technical digest - International Electron Devices Meeting/Technical digest

Works count: 6

Citation count: 21

H-index: 3

I10-index: 1