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M.J. Pulley
Institution:
Intel (United States)
Observed institution:
Intel (United States)
OpenAlex ID:
A5000758516
Design considerations of phase-locked loop systems for spread spectrum clock generation compatibility
2002
·
K.B. Hardin
, J.T. Fessler
, et al.
·
IEEE International Symposium on Electromagnetic Compatibility
·
25
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1
Citation count:
25
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