Author

Haruyuki Sorada

Observed names: H Sorada, H. Sorada, Haruyuki SORADA

Institution: Panasonic (Japan)

Observed institutions: Panasonic (Japan), Panasonic (China), The University of Osaka

OpenAlex ID: A5000935658

Selective epitaxial Si/SiGe growth forVTshift adjustment in highkpMOS devices

2006 · R Loo, H Sorada, et al. · Semiconductor Science and Technology · 22

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40mΩ / 1700V DioMOS (Diode in SiC MOSFET) for High Power Switching Applications

2014 · Atsushi Ohoka, Nobuyuki Horikawa, et al. · Materials science forum · 15

Low-frequency noise characteristics in SiGe channel heterostructure dynamic threshold pMOSFET (HDTMOS)

2003 · A. Asai, J. Sato-Iwanaga, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 11

Reduction of RonA retaining high threshold voltage in SiC DioMOS by improved channel design

2018 · Atsushi Ohoka, Masao Uchida, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 7

Selective Epitaxy of Si/SiGe to Improve pMOS Devices by Recessed Source/Drain and/or Buried SiGe Channels

2006 · Roger Loo, Peter Verheyen, et al. · ECS Transactions · 7

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Optimized design of Si-cap layer in strained-SiGe channel p-MOSFETs based on computational and experimental approaches

2013 · Junko Sato-Iwanaga, Akira Inoue, et al. · Solid-State Electronics · 6

Numerical Study of Flicker Noise in p-Type $ \hbox{Si}_{0.7}\hbox{Ge}_{0.3}/\hbox{Si}$ Heterostructure MOSFETs

2008 · Chia-Yu Chen, Yang Liu, et al. · IEEE Transactions on Electron Devices · 6

A monolithically integrated Si interband tunneling diode (IBTD)/MOSFET memory for ultra low voltage operation below 0.5 V

2000 · H. Sorada, K. Morita, et al. · Superlattices and Microstructures · 6

Monolithic integration of Si-interband tunneling diodes with a MOSFET for ultralow voltage operation static random access memory

2000 · Kiyoshi Morimoto, Haruyuki Sorada, et al. · FEDジャ-ナル · 5

Selective Epitaxial Si/SiGe for VT Shift Adjustment in High k pMOS Devices