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Author

Ivan Ratković

Observed names: I. Ratkovic, Ivan Ratkovic
ORCID: 0000-0002-0524-7227
Observed ORCID: 0000-0002-0524-7227
OpenAlex ID: A5002149657
Research in computing-intensive simulations for nature-oriented civil-engineering and related scientific fields, using machine learning and big data: an overview of open problems
2023 · Zoran Babović, Branislav Bajat, et al. · Journal Of Big Data · 34
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An Overview of Architecture-Level Power- and Energy-Efficient Design Techniques
2015 · Ivan Ratković, Nikola Bežanić, et al. · Advances in computers · 24
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Teaching computing for complex problems in civil engineering and geosciences using big data and machine learning: synergizing four different computing paradigms and four different management domains
2023 · Zoran Babović, Branislav Bajat, et al. · Journal Of Big Data · 20
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The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for Scientific Computing, Geo Physics, Complex Mathematics, and Information Processing
2021 · Veliko Milutinovic, Erfan Sadeqi Azer, et al. · Mediterranean Conference on Embedded Computing (MECO) · 11
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Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi
2014 · Milan Stanic, Oscar Palomar, et al. · International Conference on High Performance Computing & Simulation (HPCS) · 11
Physical vs. Physically-Aware Estimation Flow: Case Study of Design Space Exploration of Adders
2014 · Ivan Ratkovic, Oscar Palomar, et al. · IEEE Computer Society Annual Symposium on VLSI · 10
On the selection of adder unit in energy efficient vector processing
2013 · I. Ratkovic, O. Palomar, et al. · International Symposium on Quality Electronic Design (ISQED) · 7
The Ultimate Data Flow for Ultimate Super Computers-on-a-Chip
2021 · Veljko Milutinović, Miloš Kotlar, et al. · Advances in systems analysis, software engineering, and high performance computing book series · 6
Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add
2018 · Ivan Ratkovic, Oscar Palomar, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 5
An Integrated Vector-Scalar Design on an In-Order ARM Core
2017 · Milan Stanic, Oscar Palomar, et al. · ACM Transactions on Architecture and Code Optimization · 5
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Towards low-power embedded vector processor
2016 · Milan Stanic, Oscar Palomar, et al. · ACM International Conference on Computing Frontiers (CF) · 5
VALib and SimpleVector
2014 · Milan Stanic, Oscar Palomar, et al. · ACM International Conference on Computing Frontiers (CF) · 5
Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors
2015 · Ivan Ratkovic, Oscar Palomar, et al. · IEEE Computer Society Annual Symposium on VLSI · 4
The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chips.
2020 · Veljko Milutinović, Miloš Kotlar, et al. · arXiv (Cornell University) · 3
A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques
2016 · Ivan Ratković, Oscar Palomar, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 3
An efficient FPGA implementation of floating point addition
2015 · Djordje Pesic, Ivan Ratkovic · Telecommunications Forum (TELFOR) · 3
Imposing coarse-grained reconfiguration to general purpose processors
2015 · M. Duric, M. Stanic, et al. · International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation · 2
On the design of power- and energy-efficient functional units for vector processors
2016 · Ivan Ratkovic · 1
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Introduction to Control Flow
2021 · Ivan Ratković, Miljan Djordjevic · Advances in systems analysis, software engineering, and high performance computing book series
POSTER
2016 · Milan Stanic, Oscar Palomar, et al. · International Conference on Parallel Architectures and Compilation Techniques (PACT)
Works count: 20
Citation count: 159
H-index: 7
I10-index: 6
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