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S. Hashimoto
Institution:
NEC (Japan)
Observed institution:
NEC (Japan)
OpenAlex ID:
A5008755259
A 2.5-ns clock access, 250-MHz, 256-Mb SDRAM with synchronous mirror delay
1996
·
T. Saeki
, Y. Nakaoka
, et al.
·
IEEE Journal of Solid-State Circuits
·
87
A 2.5 ns clock access 250 MHz 256 Mb SDRAM with a synchronous mirror delay
2002
·
T. Saeki
, Y. Nakaoka
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
35
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Citation count:
122
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