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P.V.R. Raja

Observed names: P. Raja, P.V. Raja, Paruvachi V. R. Raja, Paruvachi VR Raja
Observed institution: Oakland University
OpenAlex ID: A5014065415
Introduction to Hardware Description Languages (HDLs)
2020 · P. Raja, Dushyant Kumar Singh, et al. · CRC Press eBooks · 2
An Orthogonal Multiprocessor With Snooping Caches
2005 · P.V.R. Raja, S. Ganesan · Distributed Memory Computing Conference · 1
An SIMD multiple DSP microprocessor system for image processing
1991 · Paruvachi VR Raja, Subramaniam Ganesan · Microprocessors and Microsystems · 1
An SIMD Multiprocessor Using DSP Microprocessors
2005 · S. Ganesan, P.V.R. Raja · Distributed Memory Computing Conference
A hardware cache coherency scheme for multiprocessors
2002 · P.V. Raja, S. Ganesan · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
Novel design techniques for RNS systolic VLSI arrays
1991 · Paruvachi V. R. Raja · Lecture notes in computer science
Custom design of CMOS read only memories for VLSI residue number system hardware.
1988 · P.V.R. Raja · Scholarship at UWindsor (University of Windsor)
Works count: 7
Citation count: 4
H-index: 1
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