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Akihiro Imamoto

OpenAlex ID: A5022651978
A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology
2018 · Hiroshi Maejima, Kazushige Kanda, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 81
7.1 A low-power 64Gb MLC NAND-flash memory in 15nm CMOS technology
2015 · Mario Sako, Yoshihisa Watanabe, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 34
A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology
2015 · Mario Sako, Yoshihisa Watanabe, et al. · IEEE Journal of Solid-State Circuits · 27
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with t PROG =75µs and t R =4µs
2020 · Toshiyuki Kouchi, Noriyasu Kumazaki, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 18
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs
2020 · Toshiyuki Kouchi, Mami Kakoi, et al. · IEEE Journal of Solid-State Circuits · 11
A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os
2025 · Kosuke Yanagidaira, Mario Sako, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7
A 29-Gb/mm 2 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology
2025 · Kosuke Yanagidaira, Mario Sako, et al. · IEEE Journal of Solid-State Circuits · 1
15nm CMOS技術による低電力64Gb MLC NANDフラッシュメモリ
2015 · Mario Sako, Yoshihisa Watanabe, et al. · IEICE Technical Report; IEICE Tech. Rep.
Works count: 8
Citation count: 179
H-index: 6
I10-index: 5
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