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Author

Yoshihiko Satsukawa

Observed names: Y. Satsukawa, 禎彦 薩川
Institution: Fujitsu (Japan)
Observed institution: Fujitsu (Japan)
OpenAlex ID: A5059863262
A 1.3-GHz fifth-generation SPARC64 microprocessor
2003 · H. Ando, Y. Yoshida, et al. · IEEE Journal of Solid-State Circuits · 106
A 1.3GHz fifth generation SPARC64 microprocessor
2003 · Hisashige Ando, Yuuji Yoshida, et al. · ACM/IEEE Design Automation Conference (DAC) · 87
A 1.3 GHz fifth generation SPARC64 microprocessor
2003 · H. Ando, Y. Yoshida, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 39
A 1.3GHz fifth generation SPARC64 microprocessor
2004 · H. Ando, Y. Yoshida, et al. · ACM/IEEE Design Automation Conference (DAC) · 9
A 285 MHz 6-port plesiochronous router chip with non-blocking cross-bar switch
2002 · A. Mu, B. Chia, et al. · Symposium on VLSI Circuits · 9
A 1.3GHz fifth generation SPARC64 microprocessor
2003 · Hisashige Ando, Hideo Yamashita, et al. · ACM/IEEE Design Automation Conference (DAC) · 6
高信頼設計sparc64 V マイクロプロセサ(システムlsiの応用とその要素技術,専用プロセッサ,プロセッサ,dsp,画像処理技術,及び一般)
2003 · 壽茂 安藤, 裕司 吉田, et al. · 電子情報通信学会技術研究報告. DSP, ディジタル信号処理
Works count: 7
Citation count: 256
H-index: 6
I10-index: 3
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