Get started
Author

İsmail San

Observed names: Ismail SAN, Ismail San, İsmail SAN
ORCID: 0000-0003-3005-1813
Observed ORCID: 0000-0003-3005-1813
OpenAlex ID: A5069831788
IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS
2022 · Ecenur Ustun, Ismail San, et al. · IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) · 37
Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA
2013 · Nuray At, Jean-Luc Beuchat, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 35
Detecting hardware Trojans in unspecified functionality through solving satisfiability problems
2017 · Nicole Fern, Ismail San, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 33
Hiding Hardware Trojan Communication Channels in Partially Specified SoC Bus Functionality
2016 · Nicole Fern, Ismail San, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 33
Efficient paillier cryptoprocessor for privacy‐preserving data mining
2016 · Ismail San, Nuray At, et al. · Security and Communication Networks · 32
Improving the computational efficiency of modular operations for embedded systems
2013 · Ismail San, Nuray At · Journal of Systems Architecture · 31
Compact Keccak Hardware Architecture for Data Integrity and Authentication on FPGAs
2012 · Ismail San, Nuray At · Information Security Journal A Global Perspective · 26
Hardware Trojans in Incompletely Specified On-chip Bus Systems
2016 · Nicole Fern, Ismail San, et al. · Design, Automation, and Test in Europe · 22
Compact Implementation of Threefish and Skein on FPGA
2012 · Nuray At, Jean-Luc Beuchat, et al. · IFIP International Conference on New Technologies, Mobility and Security (NTMS) · 17
A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl
2017 · Nuray At, Jean-Luc Beuchat, et al. · Journal of Parallel and Distributed Computing · 12
On Increasing the Computational Efficiency of Long Integer Multiplication on FPGA
2012 · Ismail San, Nuray At · IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom) · 9
Compact Hardware Architecture for Hummingbird Cryptographic Algorithm
2011 · Ismail San, Nuray At · International Conference on Field Programmable Logic and Applications (FPL) · 7
HW/SW Co-Design of TFHE Homomorphic OR Gate via NTT-based Polynomial Multiplication on a programmable SoC
2022 · Batuhan Bulut, Saliha Nur Bicakci, et al. · Innovations in Intelligent Systems and Applications Conference (ASYU) · 5
LowLAG: Low-latency hardware accelerator of a sound effect with system-on-chip design
2020 · Yunus Emre ESEN, Ismail SAN · Innovations in Intelligent Systems and Applications Conference (ASYU) · 5
Deep reinforcement learning‐based autonomous parking design with neural network compute accelerators
2021 · Alican Özeloğlu, İsmihan Gül Gürbüz, et al. · Concurrency and Computation Practice and Experience · 4
Highly Parallel Multi-FPGA System Compilation from Sequential C/C++ Code in the AWS Cloud
2022 · Kemal Ebcioglu, Ismail San · ACM Transactions on Reconfigurable Technology and Systems · 2
Low-Latency SoC Design with High-Level Accelerators Specific to Sound Effects
2021 · Yunus Emre ESEN, İsmail SAN · International Journal of Advances in Engineering and Pure Sciences · 2
PDF
LLMonPro: Low-Latency Montgomery Modular Multiplication Suitable for Verifiable Delay Functions.
2021 · İsmail San · IACR Cryptology ePrint Archive · 2
Acceleration of Neural Network Training on Hardware via HLS for an Edge-AI Device
2020 · Alican Ozeloglu, Ismail San · Innovations in Intelligent Systems and Applications Conference (ASYU) · 2
1,024‐FPGA DES Supercomputer on the AWS Cloud
2025 · Kemal Ebcioğlu, Batuhan Bulut, et al. · Concurrency and Computation Practice and Experience · 1
Trojans modifying soft-processor instruction sequences embedded in FPGA bitstreams
2016 · Ismail San, Nicole Fern, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 1
On the Importance of Improving Cache Locality in Application-specific Accelerators via HLS
2020 · Yasin Alptekin, Ismail San · Signal Processing and Communications Applications Conference (SIU)
A Low Area Fully Pipelined Implementation of JPEG on FPGA
2018 · Atakan Doğan, İsmail San · Anadolu University Journal of Science and Technology-A Applied Sciences and Engineering
Works count: 25
Citation count: 319
H-index: 10
I10-index: 10
Year
Topic
Type