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Miguel Jiménez Arribas

Observed names: Arribas, Miguel Jiménez, Jiménez Arribas, Miguel
Observed institution: Universidad de Alcalá
ORCID: 0000-0002-6209-9742
Observed ORCID: 0000-0002-6209-9742
OpenAlex ID: A5073729098
A RISC-V Processor Design for Transparent Tracing
2020 · Iván Gamino del Río, Agustín Martínez Hellín, et al. · Electronics · 9
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Design and implementation of a synchronous Hardware Performance Monitor for a RISC-V space-oriented processor
2024 · Miguel Jiménez Arribas, Agustín Martínez Hellín, et al. · Microprocessors and Microsystems · 4
Count overflow and privilege mode filtering extension implementation on a RISC-V on-board processor
2024 · Andrea Fernández Gallego, Miguel Jiménez Arribas, et al. · Microprocessors and Microsystems · 2
High-Performance RISC-V CSR Access in FPGAs: Optimized Microarchitecture for Efficient Decoding and Multiplexing
2026 · Miguel Jiménez Arribas, Agustín Martínez Hellín, et al. · ACM Transactions on Reconfigurable Technology and Systems · 1
Design and implementation of a synchronous Hardware Performance Monitor for a RISC-V space-oriented processor
2024 · Arribas, Miguel Jiménez, Hellín, Agustín Martínez, et al. · arXiv (Cornell University) · 1
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Contribuciones al desarrollo de unidades de estadísticas y trazado en una arquitectura RISC-V orientadas a su uso en misiones espaciales
2025 · Jiménez Arribas, Miguel · e_Buah
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Desarrollo de un simulador dinámico para el ensayo de alternativas de control multivariable
2018 · Miguel Jiménez Arribas
Works count: 8
Citation count: 17
H-index: 2
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