Author

Răzvan Nane

Observed names: Nane Razvan, Nane, R., Nane, Razvan, R. Nane, Razvan Nane

Observed institution: Delft University of Technology

ORCID: 0000-0003-4175-6560

Observed ORCID: 0000-0003-4175-6560

OpenAlex ID: A5073795444

A Survey and Evaluation of FPGA High-Level Synthesis Tools

2015 · Razvan Nane, Vlad-Mihai Sima, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 536

DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler

2012 · Razvan Nane, Vlad-Mihai Sima, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 85

OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators

2021 · N. Khammassi, I. Ashraf, et al. · ACM Journal on Emerging Technologies in Computing Systems · 58

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On the Implementation of Computation-in-Memory Parallel Adder

2017 · Hoang Anh Du Nguyen, Lei Xie, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 34

Parallel matrix multiplication on memristor-based computation-in-memory architecture

2016 · Adib Haron, Jintao Yu, et al. · International Conference on High Performance Computing & Simulation (HPCS) · 26

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Computation-in-memory based parallel adder

2015 · Hoang Anh Du Nguyen, Lei Xie, et al. · IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) · 24

Sparstition: A Partitioning Scheme for Large-Scale Sparse Matrix Vector Multiplication on FPGA

2019 · Bjorn Sigurbergsson, Tom Hogervorst, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 16

Controlling a complete hardware synthesis toolchain with LARA aspects

2013 · João M.P. Cardoso, Tiago Carvalho, et al. · Microprocessors and Microsystems · 16

REFLECT: Rendering FPGAs to Multi-core Embedded Computing

2011 · João M. P. Cardoso, Pedro C. Diniz, et al. · Springer eBooks · 16

High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain

2014 · Razvan Nane, Vlad Mihai Sima, et al. · IEEE International Conference on Embedded and Ubiquitous Computing (EUC) · 13

Quipu

2013 · Roel Meeuws, S. Arash Ostadzadeh, et al. · ACM Transactions on Reconfigurable Technology and Systems · 9

Skeleton-based design and simulation flow for Computation-in-Memory architectures

2016 · Yu, J., Nane, R., et al. · TU/e Research Portal · 8

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Skeleton-Based Synthesis Flow for Computation-in-Memory Architectures

2017 · Jintao Yu, Razvan Nane, et al. · IEEE Transactions on Emerging Topics in Computing · 7

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An Image Processing VLIW Architecture for Real-Time Depth Detection

2016 · Dan Iorga, Razvan Nane, et al. · Proceedings · 5

Low-Cost Software Control-Flow Error Recovery

2015 · Ghazaleh Nazarian, Razvan Nane, et al. · Euromicro Conference on Digital System Design (DSD) · 3

An Evaluation and Comparison of GPU Hardware and Solver Libraries for Accelerating the OPM Flow Reservoir Simulator

2023 · Qiu, Tong Dong, Thune, Andreas, et al. · arXiv (Cornell University) · 2

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Hardware Acceleration of High-Performance Computational Flow Dynamics Using High-Bandwidth Memory-Enabled Field-Programmable Gate Arrays

2021 · Tom Hogervorst, Răzvan Nane, et al. · ACM Transactions on Reconfigurable Technology and Systems · 2

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A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons

2017 · Jintao Yu, Tom Hogervorst, et al. · ACM Great Lakes Symposium on VLSI (GLSVLSI) · 2

Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach

2013 · José G. F. Coutinho, João M. P. Cardoso, et al. · Lecture notes in computer science · 2

Hardware/Software Compilation

2013 · Ricardo Nobre, João M. P. Cardoso, et al. · Springer eBooks · 2

IP-XACT extensions for Reconfigurable Computing

2011 · Razvan Nane, Sven van Haastregt, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 2

Automatic Hardware Generation for Reconfigurable Architectures

2014 · Nane, R. · Research Repository (Delft University of Technology) · 1

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The REFLECT Design-Flow

2013 · João M. P. Cardoso, José Gabriel de F. Coutinho, et al. · Springer eBooks · 1

Area constraint propagation in high level synthesis

2012 · R. Nane, V.M. Sima, et al. · International Conference on Field-Programmable Technology (FPT) · 1

A lightweight speculative and predicative scheme for hardware execution

2012 · Razvan Nane, Vlad-Mihai Sima, et al. · International Conference on ReConFigurable Computing and FPGAs (ReConFig) · 1

Works count: 33

Citation count: 872

H-index: 10

I10-index: 10