Author

W. Shibamoto

Observed name: Wataru Shibamoto

OpenAlex ID: A5074092986

A 51.2GOPS 1.0GB/s-DMA single-chip multi-processor integrating quadruple 8-way VLIW processors

2005 · T. Shiota, K. Kawasaki, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 30

Supply Voltage Adjustment Technique for Low Power Consumption and Its Application to SOCs with Multiple Threshold Voltage CMOS

2006 · H. Okano, T. Shiota, et al. · Symposium on VLSI Circuits · 9

An 8-way VLIW embedded multimedia processor built in 7-layer metal 0.11μm CMOS technology

2002 · H. Okano, A. Suga, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 7

A 1 V, 10.4 mW low power DSP core for mobile wireless use

2003 · T. Shiota, I. Fukushi, et al. · Symposium on VLSI Circuits · 3

An 8-way VLIW embedded multimedia processor built in 7-layer metal 0.11 /spl mu/m CMOS technology

2002 · H. Okano, A. Suga, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 3

Supply Voltage Adjustment Technique with Process-Voltage Conversion Table for Low Power Consumption

2007 · Atsuki Inoue, Hiroshi Okano, et al. · IEEE International Conference on IC Design and Technology (ICICDT) · 1

A 1V, 10.4mW Low Power DSP Core for Mobile Wireless Use

2000 · R. Sasagawa, W. Shibamoto, et al. · IEICE Transactions on Electronics · 1

Works count: 7

Citation count: 54

H-index: 3

I10-index: 1