Author

Tsuneo Nakata

Observed name: T. Nakata

Observed institution: Fujitsu (Japan)

OpenAlex ID: A5087997458

CTL model checking based on forward state traversal

1996 · Hiroaki Iwashita, Tsuneo Nakata, et al. · 54

Forward model checking techniques oriented to buggy designs

1997 · Hiroaki Iwashita, Tsuneo Nakata · 35

An object-oriented design process for system-on-chip using UML

2002 · Qiang Zhu, Akio Matsuda, et al. · International Symposium on System Synthesis (ISSS) · 33

System-on-chip validation using UML and CWL

2004 · Qiang Zhu, Ryosuke Oishi, et al. · International Conference on Hardware/Software Codesign and System Synthesis · 26

CTL model checking based on forward state traversal

2002 · H. Iwashita, T. Nakata, et al. · International Conference on Computer Aided Design · 26

A method of static compaction of test stimuli

2002 · K.O. Boateng, H. Konishi, et al. · Proceedings - Asian Test Symposium/Proceedings · 19

Integrating UML into SoC Design Process

2005 · Qiang Zhu, R. Oishi, et al. · Design, Automation, and Test in Europe · 14

An approach to verify a large scale system-on-a-chip using symbolic model checking

2002 · K. Takayama, T. Satoh, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 13

Functional Verification of System on Chips-Practices, Issues and Challenges

2002 · Subir Kumar Roy, S. Ramesh, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 7

Behavioral design and test assistance for pipelined processors

2003 · H. Iwashita, T. Nakata, et al. · Proceedings - Asian Test Symposium/Proceedings · 3

Integrated Design and Test Assistance for Pipeline Controllers (Special Issue on VLSI Testing and Testable Design)

1993 · Hiroaki Iwashita, Tsuneo Nakata, et al. · IEICE Transactions on Information and Systems · 3

Formal verification based on assume and guarantee approach: a case study

2002 · S.K. Roy, H. Iwashita, et al. · ACM/IEEE Design Automation Conference (DAC) · 2

An object-oriented design process for system-on-chip using UML

2002 · Qiang Zhu, Akio Matsuda, et al. · International Symposium on System Synthesis (ISSS) · 2

Research and Development and Related Activities at Fujitsu Laboratories Overseas Bases

2016 · Yasunori Kimura, Satoshi Naoi, et al. · 1

System-on-Chip Verification Process Using UML

2005 · Qiang Zhu, Tsuneo Nakata, et al. · Lecture notes in computer science · 1

Automatic program generator for simulation-based processor verification

2002 · H. Iwashita, S. Kowatari, et al. · Proceedings - Asian Test Symposium/Proceedings · 1

Formal verification based on assume and guarantee approach --- a case study (short paper)

2000 · Subir K. Roy, Hiroaki Iwashita, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 1

Session details: System level simulation and modeling

2009 · Vincent J. Mooney, Tsuneo Nakata · Asia and South Pacific Design Automation Conference (ASP-DAC)

Validation using LJML and CWL

2004 · Qiang Zhu, Ryosuke Oishi, et al.

Dataflow analysis for resource contention and register leakage properties

2002 · S.K. Roy, H. Iwashita, et al. · International Conference on VLSI Design

Tutorial One Functional Verification of System on Chips - Practices, Issues and Challenges

2002 · Subir Kumar Roy, S. Ramesh, et al.

Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).

2002 · Subir Kumar Roy, S. Ramesh, et al. · VLSI design

Efficient Forward Model Checking Algorithm for ω-Regular Properties (Special Section on VLSI Design and CAD Algorithms)

1999 · Hiroaki Iwashita, Tsuneo Nakata · IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences

Works count: 26

Citation count: 241

H-index: 8

I10-index: 8