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Anshul Kumar

Strap-down Pedestrian Dead-Reckoning system
2011 · Pragun Goyal, Vinay J. Ribeiro, et al. · International Conference on Indoor Positioning and Indoor Navigation · 137
ASIP design methodologies: survey and issues
2002 · M.K. Jain, M. Balakrishnan, et al. · International Conference on VLSI Design · 130
Accelerating CNN Inference on ASICs: A Survey
2020 · Diksha Moolchandani, Anshul Kumar, et al. · Journal of Systems Architecture · 96
Impact of intercluster communication mechanisms on ILP in clustered VLIW architectures
2007 · Anup Gangwar, M. Balakrishnan, et al. · ACM Transactions on Design Automation of Electronic Systems · 65
Application Specific Datapath Extension with Distributed I/O Functional Units
2007 · Nagaraju Pothineni, Anshul Kumar, et al. · International Conference on VLSI Design · 34
Automatic synthesis of system on chip multiprocessor architectures for process networks
2004 · Basant Kumar Dwivedi, Anshul Kumar, et al. · International Conference on Hardware/Software Codesign and System Synthesis · 33
A Trimaran based framework for exploring the design space of VLIW ASIPs with coarse grain functional units
2002 · Bhuvan Middha, Anup Gangwar, et al. · International Symposium on System Synthesis (ISSS) · 27
Grammar-based hardware synthesis of data communication protocols
2002 · J. Oberg, A. Kumar, et al. · International Symposium on System Synthesis (ISSS) · 24
Performance and Power Prediction for Concurrent Execution on GPUs
2022 · Diksha Moolchandani, Anshul Kumar, et al. · ACM Transactions on Architecture and Code Optimization · 22
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Direct mapping of RTL structures onto LUT-based FPGA's
1998 · A.R. Naseer, M. Balakrishnan, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 22
A high-level synthesis flow for custom instruction set extensions for application-specific processors
2010 · Nagaraju Pothineni, Philip Brisk, et al. · 20
Power Reduction in VLIW Processor with Compiler Driven Bypass Network
2007 · Neeraj Goel, Anshul Kumar, et al. · International Conference on VLSI Design · 20
Chasing subtle embedded ram defects for nanometer technologies
2006 · T. Powell, A. Kumar, et al. · IEEE International Test Conference (ITC) · 19
MAC scheduling policies with reduced power consumption and bounded packet delays for centrally controlled TDD wireless networks
2002 · I. Chakraborty, A. Kashyap, et al. · International Conference on Communications · 19
Grammar-based hardware synthesis from port-size independent specifications
2000 · J. Oberg, A. Kumar, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 19
Automatic generation of digital system schematic diagrams
1985 · Anjali Arya, Anshul Kumar, et al. · ACM/IEEE Design Automation Conference (DAC) · 18
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A high-level synthesis flow for custom instruction set extensions for application-specific processors
2010 · Nagaraju Pothineni, Philip Brisk, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 17
Automatic Generation of Digital System Schematic Diagrams
1986 · Anshul Kumar, Anjali Arya, et al. · IEEE Design & Test of Computers · 17
Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units
2004 · Diviya Jain, Anshul Kumar, et al. · Lecture notes in computer science · 16
Emotion detection in psychological texts by fine-tuning BERT using emotion–cause pair extraction
2022 · Anshul Kumar, Ankit Kumar Jain · International Journal of Speech Technology · 15
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
2008 · Nagaraju Pothineni, Anshul Kumar, et al. · International Conference on VLSI Design · 14
Ideas: a tool for VLSI CAD
1989 · Alok Kumar, Vijeta Kashyap, et al. · IEEE Design & Test of Computers · 14
Battery aware dynamic scheduling for periodic task graphs
2006 · Venkat Rao, Nicolas Navet, et al. · 13
Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators
2020 · Saurabh Tewari, Anshul Kumar, et al. · IEEE Computer Society Annual Symposium on VLSI · 12
Instruction Selection in ASIP Synthesis Using Functional Matching
2010 · Nidhi Arora, Kiran Chandramohan, et al. · International Conference on VLSI Design · 12
Works count: 116
Citation count: 1,174
H-index: 17
I10-index: 31
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