Get started
Author

G. Saucier

A new approach to control flow checking without program modification
2002 · T. Michel, R. Leveugle, et al. · IEEE International Symposium on Fault-Tolerant Computing · 76
Optimized synthesis of concurrently checked controllers
1990 · R. Leveugle, G. Saucier · IEEE Transactions on Computers · 74
ASYL: A Rule-Based System for Controller Synthesis
1987 · G. Saucier, M. Crastes de Paulet, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 64
State assignment using a new embedding method based on an intersecting cube theory
1989 · G. Saucier, C. Duff, et al. · ACM/IEEE Design Automation Conference (DAC) · 41
PDF
Multilevel synthesis minimizing the routing factor
1990 · P. Abouzeid, K. Sakouti, et al. · ACM/IEEE Design Automation Conference (DAC) · 38
Partitioning with cone structures
1993 · G. Saucier, D. Brasen, et al. · 32
Design of microprocessors with built-in on-line test
2002 · R. Leveugle, T. Michel, et al. · IEEE International Symposium on Fault-Tolerant Computing · 30
FPGA-Based Emulation: Industrial and Custom Prototyping Solutions
2000 · Helena Krupnova, Gabriele Saucier · Lecture notes in computer science · 30
Logic and Architecture Synthesis: State-of-the-art and novel approaches
1995 · Gabrièle Saucier, Anne Mignotte · IFIP advances in information and communication technology · 28
State Assignment of Asynchronous Sequential Machines Using Graph Techniques
1972 · Gabriele Saucier · IEEE Transactions on Computers · 28
A Hierarchy-driven Fpga Partitioning method
1997 · H. Krupnova, A. Abbara, et al. · ACM/IEEE Design Automation Conference (DAC) · 25
Multilevel synthesis minimizing the routing factor
2002 · P. Abouzeid, K. Sakouti, et al. · ACM/IEEE Design Automation Conference (DAC) · 24
The Hyeti defect tolerant microprocessor: a practical experiment and its cost-effectiveness analysis
1994 · R. Leveugle, Z. Koren, et al. · IEEE Transactions on Computers · 24
Input-driven partitioning methods and application to synthesis on table-lookup-based FPGAs
1993 · P. Abouzeid, B. Babba, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 24
Partitioning with cone structures
2002 · G. Saucier, D. Brasen, et al. · International Conference on Computer Aided Design · 22
Fast Generation of Neuro-ASICs
1990 · J. Ouali, G. Saucier · Springer eBooks · 22
Formalizing Signature Analysis for Control Flow Checking of Pipelined RISC Microprocessors
2005 · X. Delord, G. Saucier · IEEE International Test Conference (ITC) · 21
Synthesis and floorplanning for large hierarchical FPGAs
1997 · H. Krupnova, C. Rabedaoro, et al. · ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA) · 21
PDF
Analysis and comparison of fault tolerant FSM architecture based on SEC codes
2002 · R. Rochet, R. Leveugle, et al. · Proceedings · 19
Using cone structures for circuit partitioning into FPGA packages
1998 · D.R. Brasen, G. Saucier · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 18
Configuring a wafer-scale two-dimensional array of single-bit processors
1992 · A. Boubekeur, J.-L. Patry, et al. · Computer · 17
Defect Tolerance in a Wafer Scale Array for Image Processing
1989 · G. Saucier, J.-L. Patry, et al. · Springer eBooks · 16
Hierarchical Test Generation Based on Delayed Propagation
2005 · M. Karam, R. Leveugle, et al. · IEEE International Test Conference (ITC) · 15
Synthesis on multiplexer-based FPGA using binary decision diagrams
2003 · T. Besson, H. Bouzouzou, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 15
Input driven synthesis of PLDs and PGAs
2003 · B. Babba, M. Crastes, et al. · European Design Automation Conference · 15
Works count: 174
Citation count: 1,212
H-index: 19
I10-index: 41
Year
Topic
Type