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Akira Matsuzawa

Observed names: A Matsuzawa, A. Matsuzawa, AKIRA MATSUZAWA, Akira MATSUZAWA, Matsuzawa Akira, Matsuzawa, Akira, 松澤昭
OpenAlex ID: A5111453629
A low-noise self-calibrating dynamic comparator for high-speed ADCs
2008 · Masaya Miyahara, Yusuke Asada, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 423
A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c
2011 · Kenichi Okada, Kota Matsushita, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 216
A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique
2014 · Wei Deng, Dongsheng Yang, et al. · IEEE Journal of Solid-State Circuits · 152
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A 120Gb/s 16QAM CMOS millimeter-wave wireless transceiver
2018 · Korkut K. Tokgoz, Taisuke Iwai, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 142
64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay
2017 · Rui Wu, Ryo Minami, et al. · IEEE Journal of Solid-State Circuits · 142
Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry
2012 · Kenichi Okada, Keitarou Kondou, et al. · IEEE Journal of Solid-State Circuits · 137
RF-SoC-expectations and required conditions
2002 · A. Matsuzawa · IEEE Transactions on Microwave Theory and Techniques · 128
A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator With an FoM of -250 dB
2016 · Aravind Tharayil Narayanan, Makihiko Katsuragi, et al. · IEEE Journal of Solid-State Circuits · 126
A CMOS image sensor with analog two-dimensional DCT-based compression circuits for one-chip cameras
1997 · S. Kawahito, M. Yoshida, et al. · IEEE Journal of Solid-State Circuits · 126
20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding
2014 · Kenichi Okada, Ryo Minami, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 112
A Low-Power Low-Noise mm-Wave Subsampling PLL Using Dual-Step-Mixing ILFD and Tail-Coupling Quadrature Injection-Locked Oscillator for IEEE 802.11ad
2016 · Teerachot Siriburanon, Satoshi Kondo, et al. · IEEE Journal of Solid-State Circuits · 111
A Compact, Low-Power and Low-Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration
2013 · Ahmed Musa, Wei Deng, et al. · IEEE Journal of Solid-State Circuits · 109
Class-C VCO With Amplitude Feedback Loop for Robust Start-Up and Enhanced Oscillation Swing
2012 · Wei Deng, Kenichi Okada, et al. · IEEE Journal of Solid-State Circuits · 108
A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry
2012 · Kenichi Okada, Keitarou Kondou, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 100
A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique
2011 · James Lin, Masaya Miyahara, et al. · IEEE International Symposium on Circuits and Systems proceedings · 91
A Fifth-Order Continuous-Time Delta-Sigma Modulator With Single-Opamp Resonator
2010 · Kazuo Matsukawa, Yosuke Mitani, et al. · IEEE Journal of Solid-State Circuits · 86
Low-voltage and low-power circuit design for mixed analog/digital systems in portable equipment
1994 · A. Matsuzawa · IEEE Journal of Solid-State Circuits · 83
A 2.2 GHz -242 dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture
2016 · Teerachot Siriburanon, Satoshi Kondo, et al. · IEEE Journal of Solid-State Circuits · 79
A 2nd order fully-passive noise-shaping SAR ADC with embedded passive gain
2016 · Zhijie Chen, Masaya Miyahara, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 75
22.6 A 2.2GS/s 7b 27.4mW time-based folding-flash ADC with resistively averaged voltage-to-time amplifiers
2014 · Masaya Miyahara, Ibuki Mano, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 75
A 60GHz CMOS power amplifier using capacitive cross-coupling neutralization with 16 % PAE
2011 · Hiroki Asada, Kota Matsushita, et al. · European Microwave Conference (EuMC) · 74
A low-offset latched comparator using zero-static power dynamic offset cancellation technique
2009 · Masaya Miyahara, Akira Matsuzawa · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 70
Sub 1 V CMOS bandgap reference design techniques: a survey
2009 · Christian Jésus B. Fayomi, Gilson I. Wirth, et al. · Analog Integrated Circuits and Signal Processing · 67
40th EASD Annual Meeting of the European Association for the Study of Diabetes
2004 · M. Veitenhansl, K. Stegner, et al. · Diabetologia · 67
A Sub-Harmonic Injection-Locked Quadrature Frequency Synthesizer With Frequency Calibration Scheme for Millimeter-Wave TDD Transceivers
2013 · Wei Deng, T. Siriburanon, et al. · IEEE Journal of Solid-State Circuits · 66
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Works count: 426
Citation count: 5,766
H-index: 39
I10-index: 115
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