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James A. Walls
Observed names:
J. A. Walls,
J. Walls,
J.A. Walls,
James Walls
Institution:
Microchip Technology (United States)
Observed institutions:
Motorola (United States),
Microchip Technology (United States)
OpenAlex ID:
A5111966345
Leakage behavior and reliability assessment of tantalum oxide dielectric MIM capacitors
2003
·
T. Remmel
, R. Ramprasad
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
38
Stress-voiding in tungsten-plug interconnect systems induced by high-temperature processing
1995
·
J.A. Walls
·
IEEE Electron Device Letters
·
27
Experimental comparison of wafer level reliability (WLR) and packaged electromigration tests
2002
·
C. Ryu
, Tse-Lun Tsai
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
14
Reliability of silicon nitride dielectric-based metal-insulator-metal capacitors
2004
·
T. Remmell
, R. Ramprasad
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
13
The influence of TiN ARC thickness on stress-induced void formation in tungsten-plug vias
1997
·
J.A. Walls
·
IEEE Transactions on Electron Devices
·
12
Electromigration performance enhancement of Cu interconnects with PVD Ta cap
2004
·
D.A. Gajewski
, T. Meixner
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
4
Plasma damage in thin gate MOS dielectrics and its effect on device characteristics and reliability
2000
·
Tomasz Brożek
, John Huber
, et al.
·
Microelectronics Reliability
·
4
Stress concentrations at W vias
1996
·
J. R. Lloyd
, J. B. Sauber
, et al.
·
AIP conference proceedings
·
4
Silicon dioxide degradation in strongly non-uniform electric field
2017
·
Yuri Tkachev
, James A. Walls
·
IEEE International Integrated Reliability Workshop final report
·
3
High-sensitivity electromigration testing of lead-free WLCSP solder bumps
2010
·
James Walls
, Shun-Meen Kuo
, et al.
·
IEEE Electronic Components and Technology Conference (ECTC)
·
3
TDDB evaluation of plasma-enhanced Si/sub 3/N/sub 4/ nitride capacitors in CMOS integration schemes
2003
·
D.A. Gajewski
, J. Walls
, et al.
·
International Symposium on Plasma Process-Induced Damage
·
3
Capacitance-voltage measurements: an expert system approach
1990
·
James Walls
·
ERA
·
3
The sources of erase voltage variability in split-gate flash memory cell arrays
2016
·
Yuri Tkachev
, James A. Walls
·
IEEE International Integrated Reliability Workshop final report
·
2
Fowler-Nordheim and hot-carrier stress study of latent plasma charging damage in various 50 Å gate dielectrics
2002
·
T. Brozek
, J. Huber
, et al.
·
International Symposium on Plasma Process-Induced Damage
·
2
Investigation of plasma damage effects on characteristics and reliability of MOS devices with thin gate dielectrics
2001
·
Tomasz Brozek
, John Huber
, et al.
·
Solid-State Electronics
·
2
Electromigration of MRAM-customized CU interconnects with cladding barriers and top cap
2005
·
D.A. Gajewski
, T. Meixner
, et al.
·
IEEE International Integrated Reliability Workshop final report
·
1
Reliability Aspects of Integrating High-¿ Dielectrics into Back-End-of-Line (BEOL) Process Technology
2006
·
Tom Remmel
, James Walls
, et al.
·
IEEE International Integrated Reliability Workshop final report
MIM Capacitor Reliability Fault Identification Using IR Microthermography and Automated De-processing: A Case Study
2003
·
J. Steele
, T. Remmel
, et al.
·
Proceedings - International Symposium for Testing and Failure Analysis
Leakage Behavior and Reliability Assessment of
2003
·
Tantalum Oxide
, T. Remmel
, et al.
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Works count:
19
Citation count:
135
H-index:
5
I10-index:
5
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