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Kunio Uchiyama
Observed name:
Kunio UCHIYAMA
Institution:
National Institute of Advanced Industrial Science and Technology
Observed institutions:
Waseda University,
University of Patras,
Hitachi (Japan),
National Institute of Advanced Industrial Science and Technology
OpenAlex ID:
A5111998768
Society 5.0: For Human Security and Well-Being
2018
·
Yoshihiro Shiroishi
, Kunio Uchiyama
, et al.
·
Computer
·
266
Better Actions for Society 5.0: Using AI for Evidence-Based Policy Making That Keeps Humans in the Loop
2019
·
Yoshihiro Shiroishi
, Kunio Uchiyama
, et al.
·
Computer
·
51
An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler
2008
·
Masayuki Ito
, Toshihiro Hattori
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
45
Design of FPGA-Based Computing Systems with OpenCL
2017
·
Hasitha Muthumala Waidyasooriya
, Masanori Hariyama
, et al.
·
Springer eBooks
·
43
A 45nm 37.3GOPS/W heterogeneous multi-core SoC
2010
·
Yoichi Yuyama
, Masayuki Ito
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
38
A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption
2007
·
Yutaka Yoshida
, Tatsuya Kamei
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
33
Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding
2008
·
Hiroaki Shikano
, Masaki Ito
, et al.
·
IEEE Journal of Solid-State Circuits
·
21
Edge Artificial Intelligence Chips for the Cyberphysical Systems Era
2021
·
Hiroshi Fuketa
, Kunio Uchiyama
·
Computer
·
18
A Low-Power Embedded RISC Microprocessor with an Integrated DSP for Mobile Applications
2002
·
Tetsuya Yamada
, Makoto Ishikawa
, et al.
·
IEICE Transactions on Electronics
·
9
Heterogeneous Multiprocessor on a Chip Which Enables 54x AAC-LC Stereo Encoding
2007
·
Masaki Ito
, Takashi Todaka
, et al.
·
IEEE Symposium on VLSI Circuits (VLSI-Circuits)
·
8
Heterogeneous Multicore Processor Technologies for Embedded Systems
2012
·
Kunio Uchiyama
, Fumio Arakawa
, et al.
·
Springer eBooks
·
7
IEEE Symposium on Low-Power and High-Speed Chips
2011
·
Hiroaki Kobayashi
, Josep Torrellas
, et al.
·
7
Design methodology of a 200MHz superscalar microprocessor
1998
·
Toshihiro Hattori
, Yusuke Nitta
, et al.
·
Proceedings - ACM IEEE Design Automation Conference
·
6
PDF
Power-efficient heteregoneous parallelism for digital convergence
2008
·
Kunio Uchiyama
·
IEEE Symposium on VLSI Circuits (VLSI-Circuits)
·
5
Software-cooperative power-efficient heterogeneous multi-core for media processing
2008
·
Hiroaki Shikano
, Masaki Ito
, et al.
·
Asia and South Pacific Design Automation Conference (ASP-DAC)
·
4
FPGA-Oriented Parallel Programming
2017
·
Hasitha Muthumala Waidyasooriya
, Masanori Hariyama
, et al.
·
Springer eBooks
·
3
Design and Architecture for Low-power/High-Speed RISC Microprocessor: SuperH
1997
·
Hideo Maejima
, Masahiro Kainaga
, et al.
·
IEICE Transactions on Electronics
·
3
Frequency–voltage cooperative CPU power control: A design rule and its application by feedback prediction
2005
·
Keisuke Toyama
, Satoshi Misaka
, et al.
·
Systems and Computers in Japan
·
2
Embedded Processor Core with 64-Bit Architecture and Its System-On-Chip Integration for Digital Consumer Products
2001
·
Kunio Uchiyama
, Fumio Arakawa
, et al.
·
IEICE Transactions on Electronics
·
2
SoC Platform for Heterogeneous Accelerator IPs SoC development platform for evaluation and demonstration
2024
·
Atsushi Hasegawa
, Makoto Ikeda
, et al.
·
International SoC Design Conference
·
1
FPGA Accelerator Design Using OpenCL
2017
·
Hasitha Muthumala Waidyasooriya
, Masanori Hariyama
, et al.
·
Springer eBooks
·
1
Exploiting the Memory Hierarchy
2017
·
Hasitha Muthumala Waidyasooriya
, Masanori Hariyama
, et al.
·
Springer eBooks
·
1
Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation
2012
·
Yoshitaka HIRAMATSU
, Hasitha Muthumala WAIDYASOORIYA
, et al.
·
IEICE Transactions on Electronics
·
1
Heterogeneous Multicore Architecture
2012
·
Kunio Uchiyama
, Fumio Arakawa
, et al.
·
Springer eBooks
·
1
Evaluation of Heterogeneous Multicore Architecture with AAC-LC Stereo Encoding
2007
·
Hiroaki Shikano
, Masaki Ito
, et al.
·
IEICE Technical Report; IEICE Tech. Rep.
·
1
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Works count:
46
Citation count:
577
H-index:
9
I10-index:
8
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