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Author

Jiahang Lou

Observed names: Jiahang, Lou, Lou, Jiahang
Institution: Fudan University
OpenAlex ID: A5113333693
CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design
2024 · Yiqing Mao, Xuchen Gao, et al. · International Conference on Field Programmable Logic and Applications (FPL) · 9
An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture
2024 · Jiahang Lou, Xuchen Gao, et al. · 4
Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs
2025 · Jiahang Lou, Qilong Zhu, et al. · Proceedings - ACM IEEE Design Automation Conference · 2
Lora: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions
2026 · Yuan Dai, Guibin Zou, et al. · ACM/IEEE International Symposium on Computer Architecture (ISCA)
Live Demonstration: An Agile FPGA-Overlayed CGRA SoC for High-Efficiency Computing
2026 · Jiahang Lou, Jianrong Zhang, et al. · IEEE International Symposium on Circuits and Systems proceedings
LoRA: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions
2026 · Dai, Yuan, Zou, Guibin, et al. · Zenodo (CERN European Organization for Nuclear Research)
LoRA: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions
2026 · Dai, Yuan, Zou, Guibin, et al. · Zenodo (CERN European Organization for Nuclear Research)
LoRA: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions
2026 · Dai, Yuan, Guibin, Zou, et al. · Zenodo (CERN European Organization for Nuclear Research)
MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes
2024 · Shaoyang Sun, Boyin Jin, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Works count: 9
Citation count: 15
H-index: 2
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