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Author

Gert Goossens

Observed names: G. Goossens, GERT GOOSSENS, Gert-Jan Goossens, Goossens, Gert
Institution: KU Leuven
Observed institutions: ETH Zurich, IMEC, International Medical Equipment Collaborative, Technicolor (France), Synopsys (Belgium), Computer Engineering and Networks Laboratory, KU Leuven
OpenAlex ID: A5113787573
Loop optimization in register-transfer scheduling for DSP-systems
1989 · G. Goossens, J. Vandewlle, et al. · ACM/IEEE Design Automation Conference (DAC) · 137
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Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms
1990 · H. De Man, F. Catthoor, et al. · Proceedings of the IEEE · 130
Chess : Retargetable Code Generation for Embedded DSP Processors
2002 · Dirk Lanneer, Johan Praet, et al. · Springer eBooks · 112
Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
1992 · P. Vanbekbergen, G. Goossens, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 108
Instruction set definition and instruction selection for ASIPs
1994 · Johan Van Praet, Gert Goossens, et al. · 106
An efficient microcode compiler for application specific DSP processors
1990 · G. Goossens, J. Rabaey, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 81
High-Level Synthesis for Real-Time Digital Signal Processing
1993 · Jan Vanhoof, Karl Rompaey, et al. · Springer eBooks · 78
Embedded software in real-time signal processing systems: application and architecture trends
1997 · P.G. Paulin, C. Liem, et al. · Proceedings of the IEEE · 73
Embedded software in real-time signal processing systems: design technologies
1997 · G. Goossens, J. Van Praet, et al. · Proceedings of the IEEE · 66
Instruction set definition and instruction selection for ASIPs
2002 · J. Van Praet, G. Goossens, et al. · International Symposium on High-Level Synthesis (ISSS) · 64
Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
2002 · P. Vanbekbergen, F. Catthoor, et al. · International Conference on Computer Aided Design · 63
Combined hardware selection and pipelining in high-performance data-path design
1992 · S. Note, F. Catthoor, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 63
Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system
1986 · R. Jain, F. Catthoor, et al. · IEEE Journal of Solid-State Circuits · 63
Specification and analysis of timing constraints in signal transition graphs
2003 · P. Vanbekbergen, G. Goossens, et al. · European Design Automation Conference · 49
: a Paradigm for Efficient Data-Path Synthesis and Code Generation
1994 · D. Lanneer, Marco Cornero, et al. · 46
Architectural strategies for an application-specific synchronous multiprocessor environment
1988 · F. Catthoor, J. Rabaey, et al. · IEEE Transactions on Acoustics Speech and Signal Processing · 45
Data routing: a paradigm for efficient data-path synthesis and code generation
2002 · D. Lanneer, M. Cornero, et al. · International Symposium on High-Level Synthesis (ISSS) · 41
CATHEDRAL-II—a computer-aided synthesis system for digital signal processing VLSI systems
1988 · H. De Man, J. Rabaey, et al. · Computer-Aided Engineering Journal · 35
Architectural synthesis for medium and high throughput signal processing with the new Cathedral environment
1991 · Dirk Lanneer, Stefaan Note, et al. · Springer eBooks · 31
A generalized state assignment theory for transformations on signal transition graphs
1994 · Peter Vanbekbergen, Bill Lin, et al. · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 29
Open-ended system for high-level synthesis of flexible signal processors
2002 · D. Lanneer, F. Catthoor, et al. · European Design Automation Conference · 28
Synthesis and optimization of asynchronous controllers based on extended lock graph theory
2002 · C. Ykman-Couvreur, B. Lin, et al. · European Design Automation Conference · 25
Real-time multi-tasking in software synthesis for information processing systems
1995 · F. Thoen, M. Cornero, et al. · International Symposium on System Synthesis (ISSS) · 24
Design of ASIPs in multi-processor SoCs using the Chess/Checkers retargetable tool suite
2006 · Gert Goossens, Dirk Lanneer, et al. · International Symposium on System-on-Chip · 23
Software Synthesis for Real-Time Information Processing Systems
2002 · Marco Cornero, Filip Thoen, et al. · Springer eBooks · 22
Works count: 83
Citation count: 1,889
H-index: 23
I10-index: 42
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