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Hiromitsu Komai

Observed name: 宏充 駒井
OpenAlex ID: A5113863941
13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology
2019 · Chang Siau, Kwang-Ho Kim, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 86
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with t PROG =75µs and t R =4µs
2020 · Toshiyuki Kouchi, Noriyasu Kumazaki, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 20
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs
2020 · Toshiyuki Kouchi, Mami Kakoi, et al. · IEEE Journal of Solid-State Circuits · 11
A 151-mm$^{2}$ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology
2011 · Koichi Fukuda, Yoshihisa Watanabe, et al. · IEEE Journal of Solid-State Circuits · 9
A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology
2011 · Koichi Fukuda, Yoshihisa Watanabe, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 6
24nmプロセスで製造された151mm2 64Gbit 2bit/cell NAND型フラッシュメモリの開発 ～ * ～
2011 · 浩一 福田, 慶久 渡辺, et al. · 電子情報通信学会技術研究報告. ICD, 集積回路
24nm CMOS技術による151mm 2 64GB MLC NANDフラッシュメモリ
2011 · Koichi Fukuda, Yoshihisa Watanabe, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
Works count: 7
Citation count: 132
H-index: 5
I10-index: 3
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