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Pohua P. Chang
Observed names:
P. P. Chang,
P.P. Chang,
Pohua Chang
Institution:
University of Illinois Urbana-Champaign
Observed institutions:
Intel (United States),
University of Illinois Urbana-Champaign,
University of Michigan,
University of Illinois System
OpenAlex ID:
A5113937041
The superblock: An effective technique for VLIW and superscalar compilation
1993
·
Wen -Mei W. Hwu
, Scott A. Mahlke
, et al.
·
The Journal of Supercomputing
·
624
IMPACT: an architectural framework for multiple-instruction-issue processors
1991
·
Pohua P. Chang
, Scott A. Mahlke
, et al.
·
Proceedings - International Symposium on Computer Architecture/Proceedings
·
298
Using profile information to assist classic code optimizations
1991
·
Pohua P. Chang
, Scott A. Mahlke
, et al.
·
Software Practice and Experience
·
231
PDF
Achieving High Instruction Cache Performance With An Optimizing Compiler
1989
·
W.W. Hisu
, Pohua P. Chang
·
Proceedings - International Symposium on Computer Architecture/Proceedings
·
221
Profile‐guided automatic inline expansion for C programs
1992
·
Pohua P. Chang
, Scott A. Mahlke
, et al.
·
Software Practice and Experience
·
159
PDF
Inline function expansion for compiling C programs
1989
·
P. P. Chang
, W.-W. Hwu
·
ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)
·
122
PDF
Data access microarchitectures for superscalar processors with compiler-assisted data prefetching
1991
·
William Y. Chen
, Scott A. Mahlke
, et al.
·
IEEE/ACM International Symposium on Microarchitecture (MICRO)
·
116
Trace Selection For Compiling Large C Application Programs To Microcode
2005
·
Pohua P. Chang
, Wen-mei W. Hwu
·
IEEE/ACM International Symposium on Microarchitecture (MICRO)
·
82
Comparing Software And Hardware Schemes For Reducing The Cost Of Branches
1989
·
Wen-mei W. Hwu
, T.M. Conte
, et al.
·
Proceedings - International Symposium on Computer Architecture/Proceedings
·
70
The effect of code expanding optimizations on instruction cache design
1993
·
W.Y. Chen
, P.P. Chang
, et al.
·
IEEE Transactions on Computers
·
65
PDF
IMPACT: an architectural framework for multiple-instruction-issue processors
1991
·
Pohua P. Chang
, Scott A. Mahlke
, et al.
·
ACM SIGARCH Computer Architecture News
·
54
PDF
The importance of prepass code scheduling for superscalar and superpipelined processors
1995
·
P.P. Chang
, D.M. Lavery
, et al.
·
IEEE Transactions on Computers
·
41
PDF
Compiler code transformations for superscalar-based high-performance systems
2003
·
S.A. Mahlke
, W.Y. Chen
, et al.
·
ACM/IEEE Conference on Supercomputing (SC)
·
39
The Superblock: An Effective Technique for VLIW and Superscalar Compilation
1993
·
Wen-Mei W. Hwu
, Scott A. Mahlke
, et al.
·
Springer eBooks
·
37
Three architectural models for compiler-controlled speculative execution
1995
·
P.P. Chang
, N.F. Warter
, et al.
·
IEEE Transactions on Computers
·
34
Comparing static and dynamic code scheduling for multiple-instruction-issue processors
1991
·
Pohua P. Chang
, William Y. Chen
, et al.
·
IEEE/ACM International Symposium on Microarchitecture (MICRO)
·
27
PDF
Inline function expansion for compiling C programs
1989
·
P. P. Chang
, W.-W. Hwu
·
ACM SIGPLAN Notices
·
25
Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution
1996
·
Po-Yung Chang
, Eric Hao
, et al.
·
International Journal of Parallel Programming
·
23
Achieving high instruction cache performance with an optimizing compiler
1989
·
W. W. Hwu
, P. P. Chang
·
ACM SIGARCH Computer Architecture News
·
23
Three Superblock Scheduling Models for Superscalar and Superpipelined Processors
1991
·
Pohua P. Chang
, Nancy J. Warter
, et al.
·
Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign)
·
22
PDF
Exploiting parallel microprocessor microarchitectures with a compiler code generator
1988
·
W. W. Hwu
, P. P. Chang
·
ACM SIGARCH Computer Architecture News
·
22
Efficient instruction sequencing with inline target insertion
1992
·
W.W. Hwu
, P.P. Chang
·
IEEE Transactions on Computers
·
17
PDF
Using predicated execution to improve the performance of a dynamically scheduled machine with speculative execution
1995
·
Po-Yung Chang
, Eric Hao
, et al.
·
International Conference on Parallel Architectures and Compilation Techniques
·
16
Tolerating data access latency with register preloading
1992
·
William Y. Chen
, Scott A. Mahlke
, et al.
·
International Conference on Supercomputing
·
15
Comparing software and hardware schemes for reducing the cost of branches
1989
·
W. W. Hwu
, T. M. Conte
, et al.
·
ACM SIGARCH Computer Architecture News
·
13
PDF
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Works count:
40
Citation count:
2,456
H-index:
22
I10-index:
27
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