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Author

Yasmine Abu-Haeyeh

Observed institution: Goethe University Frankfurt
OpenAlex ID: A5114592661
Formally Verifying Analog Neural Networks with Device Mismatch Variations
2025 · Yasmine Abu-Haeyeh, Thomas Bartelsmeier, et al. · Design, Automation, and Test in Europe · 3
Formal Verification of Nonlinear Analog Circuits using State Space-Based Model Order Reduction
2024 · Yasmine Abu-Haeyeh, Lars Hedrich · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design · 3
Behavioral Modeling of Analog Neural Networks Inference Circuits
2025 · Yasmine Abu-Haeyeh, Sascha Schmalhofer, et al. · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design · 1
Formally Verifying Analog Neural Networks Under Process Variations Using Polynomial Zonotopes
2026 · Yasmine Abu-Haeyeh, Tobias Ladner, et al. · Forum on specification and Design Languages
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Modeling of Nonlinear Analog Circuits Using Automated Reachset Conformance Checking
2026 · Caroline Draudt, Yasmine Abu-Haeyeh, et al. · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
NNHC - a Neural Network to Hardware Compiler
2025 · Sascha Schmalhofer, Yasmine Abu-Haeyeh, et al. · International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Works count: 6
Citation count: 7
H-index: 2
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