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Keyword

3D chip stacking

Description: A semiconductor packaging technique that vertically stacks integrated circuit dies and connects them to increase density and shorten interconnects.
OpenAlex ID: keywords/3d-chip-stacking
Corona: System Implications of Emerging Nanophotonic Technology
2008 · Dana Vantrease, Robert Schreiber, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings · 486
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ITRS: The International Technology Roadmap for Semiconductors
2011 · Bernd Hoefflinger · ˜The œfrontiers collection · 413
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
2007 · Jongman Kim, Chrysostomos Nicopoulos, et al. · Proceedings - International Symposium on Computer Architecture/Proceedings · 248
PicoServer
2006 · Taeho Kgil, Shaun D'Souza, et al. · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · 189
Interconnect and thermal-aware floorplanning for 3D microprocessors
2006 · W.-L. Hung, G.M. Link, et al. · International Symposium on Quality Electronic Design (ISQED) · 179
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections
2008 · K. Sakuma, P. S. Andry, et al. · IBM Journal of Research and Development · 167
Foveros: 3D Integration and the use of Face-to-Face Chip Stacking for Logic Devices
2019 · D. B. Ingerly, S. Amin, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 157
Dynamic Thermal Management in 3D Multicore Architectures
2009 · Coskun, Ayse Kivilcim, Rodrigo, Ayala, et al. · Infoscience (Ecole Polytechnique Fédérale de Lausanne) · 157
Integrated Microfluidic Cooling and Interconnects for 2D and 3D Chips
2010 · Bing Dang, Muhannad S. Bakir, et al. · IEEE Transactions on Advanced Packaging · 130
Recent progress in SLID bonding in novel 3D-IC technologies
2019 · Lei Sun, Ming-he Chen, et al. · Journal of Alloys and Compounds · 125
Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication
2007 · Gang Huang, Muhannad Bakir, et al. · 125
Dynamic thermal management in 3D multicore architectures
2009 · A.K. Coskun, J.L. Ayala, et al. · Design, Automation, and Test in Europe · 124
Au–Au Surface-Activated Bonding and Its Application to Optical Microsensors With 3-D Structure
2009 · E. Higurashi, D. Chino, et al. · IEEE Journal of Selected Topics in Quantum Electronics · 116
Materials, processing and reliability of low temperature bonding in 3D chip stacking
2018 · Liang Zhang, Zhi-quan Liu, et al. · Journal of Alloys and Compounds · 102
Inhibition of intermetallic compounds growth at Sn–58Bi/Cu interface bearing CuZnAl memory particles (2–6 μm)
2020 · Liang Zhang, Zhi-quan Liu · Journal of Materials Science Materials in Electronics · 98
Improving Data Center Energy Efficiency With Advanced Thermal Management
2017 · Timothy J. Chainer, Mark D. Schultz, et al. · IEEE Transactions on Components Packaging and Manufacturing Technology · 98
Cu/Sn microbumps interconnect for 3D TSV chip stacking
2010 · Rahul Agarwal, Wenqi Zhang, et al. · 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) · 97
Through Silicon Via and 3-D Wafer/Chip Stacking Technology
2006 · K. Takahashi, M. Sekiguchi · Symposium on VLSI Circuits · 93
3D Chip Stack Technology Using Through-Chip Interconnects
2005 · P. Benkart, A. Kaiser, et al. · IEEE Design & Test of Computers · 91
A low-radix and low-diameter 3D interconnection network design
2009 · Yi Xu, Yu Du, et al. · Proceedings - International Symposium on High-Performance Computer Architecture/Proceedings · 87
Factors Affecting Copper Filling Process Within High Aspect Ratio Deep Vias for 3D Chip Stacking
2006 · Bioh Kim, C. Sharbono, et al. · 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) · 87
IMC growth reaction and its effects on solder joint thermal cycling reliability of 3D chip stacking packaging
2012 · Wen-Hwa Chen, Ching-Feng Yu, et al. · Microelectronics Reliability · 85
Process integration of 3D chip stack with vertical interconnection
2004 · K. Takahashi, Y. Taguchi, et al. · 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) · 85
Toward five-dimensional scaling: How density improves efficiency in future computers
2011 · P. Ruch, T. Brunschwiler, et al. · IBM Journal of Research and Development · 84
3D Chip Stacking Technology with Low-Volume Lead-Free Interconnections
2007 · K Sakuma, P.S. Andry, et al. · 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) · 84
Works count: 1,062
Citation count: 11,840
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