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Keyword

ASIC design

Description: The engineering process of specifying and creating application-specific integrated circuits using hardware description languages, electronic design automation, and synthesis tools.
OpenAlex ID: keywords/asic-design
Digital Systems Testing and Testable Design
1994 · Miron Abramovici, Melvin A. Breuer, et al. · Institute of Electrical and Electronics Engineers eBooks · 2,394
Upset hardened memory design for submicron CMOS technology
1996 · T. Calin, M. Nicolaidis, et al. · IEEE Transactions on Nuclear Science · 1,175
Force-directed scheduling for the behavioral synthesis of ASICs
1989 · P.G. Paulin, J.P. Knight · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1,112
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
2006 · Sailesh Kumar, Sarang Dharmapurikar, et al. · ACM SIGCOMM Computer Communication Review · 509
Application-Specific Integrated Circuits
1997 · Michael J. Smith · CERN Document Server (European Organization for Nuclear Research) · 402
Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: practical design aspects
1999 · G. Anelli, M. Campbell, et al. · IEEE Transactions on Nuclear Science · 379
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Practical design of globally-asynchronous locally-synchronous systems
2002 · J. Muttersbach, T. Villiger, et al. · Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems · 267
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
2006 · Sailesh Kumar, Sarang Dharmapurikar, et al. · ACM SIGCOMM Conference on Applications, Technologies, Architectures, and Protocols for Computer Communications (SIGCOMM) · 233
A 232-Channel Epiretinal Stimulator ASIC
2007 · Maurits Ortmanns, AndrÉ Rocke, et al. · IEEE Journal of Solid-State Circuits · 225
Death, taxes and failing chips
2003 · Chandu Visweswariah · Proceedings - ACM IEEE Design Automation Conference · 202
Lbtorial bluespec systemverilog: efficient, correct RTL from high-level specifications
2005 · R. Nikhil · ACM/IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE) · 190
Area-throughput trade-offs for fully pipelined 30 to 70 Gbits/s AES processors
2006 · A. Hodjat, I. Verbauwhede · IEEE Transactions on Computers · 184
High Level Synthesis of ASICs under Timing and Synchronization Constraints
1992 · David C. Ku, Giovanni Micheli · Springer eBooks · 172
Unification of partitioning, placement and floorplanning
2005 · S.N. Adya, S. Chaturvedi, et al. · 168
The Olympus synthesis system
1990 · G. De Micheli, D. Ku, et al. · IEEE Design & Test of Computers · 151
Estimating routing congestion using probabilistic analysis
2001 · Jinan Lou, Shankar Krishnamoorthy, et al. · International Symposium on Physical Design · 145
KaLi: A Crystal for Post-Quantum Security Using Kyber and Dilithium
2022 · Aikata Aikata, Ahmet Can Mert, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 123
TSV redundancy: architecture and design issues in 3D IC
2010 · Ang-Chih Hsieh, TingTing Hwang, et al. · Design, Automation, and Test in Europe · 118
Trends in Hardware Security: From Basics to ASICs
2019 · Massimo Alioto · IEEE Solid-State Circuits Magazine · 113
A TCAM-based distributed parallel IP lookup scheme and performance analysis
2006 · Kai Zhen, Chengchen Hu, et al. · IEEE/ACM Transactions on Networking · 111
Efficient and Concurrent Reliable Realization of the Secure Cryptographic SHA-3 Algorithm
2014 · Siavash Bayat-Sarmadi, Mehran Mozaffari-Kermani, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 109
ISPD 2006 Placement Contest
2006 · Gi-Joon Nam · International Symposium on Physical Design · 102
Performance optimization using template mapping for datapath-intensive high-level synthesis
1996 · M.R. Corazao, M.A. Khalaf, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 98
GenieHD: Efficient DNA Pattern Matching Accelerator Using Hyperdimensional Computing
2020 · Yeseong Kim, Mohsen Imani, et al. · Design, Automation, and Test in Europe · 97
BooleDozer: Logic synthesis for ASICs
1996 · L. Stok, D. S. Kung, et al. · IBM Journal of Research and Development · 97
Works count: 4,087
Citation count: 24,150
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