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Keyword

clock jitter

Description: Timing variation in a clock signal’s transitions from their ideal periodic positions, which can introduce measurement error in electronic systems.
Wikidata ID: wiki/Q1052698
OpenAlex ID: keywords/clock-jitter
Jitter and phase noise in ring oscillators
1999 · A. Hajimiri, S. Limotyrakis, et al. · IEEE Journal of Solid-State Circuits · 1,069
Convolutional Neural Networks with Data Augmentation Against Jitter-Based Countermeasures
2017 · Eleonora Cagli, Cécile Dumas, et al. · Lecture notes in computer science · 381
Effects of communication delay on string stability in vehicle platoons
2002 · Xiangheng Liu, A. Goldsmith, et al. · IEEE Intelligent Transportation Systems Conference (ITSC) · 287
Clock jitter and quantizer metastability in continuous-time delta-sigma modulators
1999 · J.A. Cherry, W.M. Snelgrove · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 232
An all-digital phase-locked loop for high-speed clock generation
2003 · Ching-Che Chung, Chen-Yi Lee · IEEE Journal of Solid-State Circuits · 207
Jitter, Noise, and Signal Integrity at High-Speed
2007 · Mike Li · CERN Document Server (European Organization for Nuclear Research) · 176
A 10-GHz global clock distribution using coupled standing-wave oscillators
2003 · F. O'Mahony, C.P. Yue, et al. · IEEE Journal of Solid-State Circuits · 163
A continuous-time /spl Sigma//spl Delta/ Modulator with reduced sensitivity to clock jitter through SCR feedback
2005 · M. Ortmanns, F. Gerfers, et al. · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 154
A 40–550 MHz Harmonic-Free All-Digital Delay-Locked Loop Using a Variable SAR Algorithm
2007 · Rong-Jyi Yang, Shen-Iuan Liu · IEEE Journal of Solid-State Circuits · 153
A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter
2006 · A.M.A. Ali, C. Dillon, et al. · IEEE Journal of Solid-State Circuits · 145
A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS
2011 · Kostas Doris, Erwin Janssen, et al. · IEEE Journal of Solid-State Circuits · 144
Analysis of timing jitter in bandpass sigma-delta modulators
1999 · Hai Tao, L. Toth, et al. · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 142
A 40-Gb/s clock and data recovery circuit in 0.18-μm CMOS technology
2003 · Jri Lee, B. Razavi · IEEE Journal of Solid-State Circuits · 136
Radio frequency digital-to-analog converter
2004 · S. Luschas, R. Schreier, et al. · IEEE Journal of Solid-State Circuits · 131
A Very High Speed True Random Number Generator with Entropy Assessment
2013 · Abdelkarim Cherkaoui, Viktor Fischer, et al. · Lecture notes in computer science · 129
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A 960-Mb/s/pin interface for skew-tolerant bus using low jitter PLL
1997 · Sungjoon Kim, Kyeongho Lee, et al. · IEEE Journal of Solid-State Circuits · 118
Optical clock distribution using a mode-locked semiconductor laser diode system
1991 · P.J. Delfyett, D.H. Hartman, et al. · Journal of Lightwave Technology · 114
Resonant clocking using distributed parasitic capacitance
2004 · A.J. Drake, K.J. Nowka, et al. · IEEE Journal of Solid-State Circuits · 111
Jitter-Power Trade-Offs in PLLs
2021 · Behzad Razavi · IEEE Transactions on Circuits and Systems I Regular Papers · 105
The effect of time synchronization errors on the performance of cooperative MISO systems
2005 · Hamid Aghajan Sumanth Jagannathan · 101
A 40 Gb/s clock and data recovery circuit in 0.18 μm CMOS technology
2003 · J. Lee, B. Razavi · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 99
Sigma-delta modulator with spectrally shaped feedback
2003 · O. Oliaei · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 95
Analysis of jitter in phase-locked loops
2002 · D.C. Lee · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 95
A 4-GHz clock system for a high-performance system-on-a-chip design
2001 · J.M. Ingino, V.R. von Kaenel · IEEE Journal of Solid-State Circuits · 95
Level-Crossing ADC Performance Evaluation Toward Ultrasound Application
2008 · K. Kozmin, J. Johansson, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 93
Works count: 1,918
Citation count: 16,600
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