Get started
Keyword

distributed arithmetic

Description: A digital signal processing technique that reorganizes multiply-accumulate operations, often using lookup tables, for efficient hardware implementation.
OpenAlex ID: keywords/distributed-arithmetic
Applications of distributed arithmetic to digital signal processing: a tutorial review
1989 · S.A. White · IEEE ASSP Magazine · 696
Designing pipeline FFT processor for OFDM (de)modulation
2002 · Shousheng He, M. Torkelson · 296
FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic
2008 · Pramod Kumar Meher, Shrutisagar Chandrasekaran, et al. · IEEE Transactions on Signal Processing · 200
Design and Implementation of Modular FPGA-Based PID Controllers
2007 · Yuen Fong Chan, M. Moallem, et al. · IEEE Transactions on Industrial Electronics · 170
A 100-MHz 2-D discrete cosine transform core processor
1992 · S. Uramoto, Y. Inoue, et al. · IEEE Journal of Solid-State Circuits · 169
Efficient FPGA and ASIC Realizations of a DA-Based Reconfigurable FIR Digital Filter
2014 · Sang Yoon Park, Pramod Kumar Meher · IEEE Transactions on Circuits & Systems II Express Briefs · 166
LMS adaptive filters using distributed arithmetic for high throughput
2005 · D.J. Allred, Heejong Yoo, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 150
A 200 MHz 13 mm/sup 2/ 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme
1994 · M. Matsui, H. Hara, et al. · IEEE Journal of Solid-State Circuits · 146
DCT implementation with distributed arithmetic
2001 · Sungwook Yu, E.E. Swartziander · IEEE Transactions on Computers · 141
A High-Performance Energy-Efficient Architecture for FIR Adaptive Filter Based on New Distributed Arithmetic Formulation of Block LMS Algorithm
2012 · Basant K. Mohanty, Pramod Kumar Meher · IEEE Transactions on Signal Processing · 110
New Approach to Look-Up-Table Design and Memory-Based Realization of FIR Digital Filter
2009 · Pramod Kumar Meher · IEEE Transactions on Circuits and Systems I Regular Papers · 107
Low-Power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic
2013 · Sang Yoon Park, Pramod Kumar Meher · IEEE Transactions on Circuits & Systems II Express Briefs · 106
FPGA Implementation of High Speed FIR Filters Using Add and Shift Method
2006 · Shahnam Mirzaei, Anup Hosangadi, et al. · Proceedings, IEEE International Conference on Computer Design/Proceedings - IEEE International Conference on Computer Design · 101
Hardware-Efficient Distributed Arithmetic Architecture for High-Order Digital Filters
2006 · Heejong Yoo, D.V. Anderson · IEEE International Conference on Acoustics Speech and Signal Processing · 97
Two High-Performance Adaptive Filter Implementation Schemes Using Distributed Arithmetic
2011 · Rui Guo, Linda S. DeBrunner · IEEE Transactions on Circuits & Systems II Express Briefs · 95
Digital filter structures described by distributed arithmetic
1977 · C. Burrus · IEEE Transactions on Circuits and Systems · 91
On the realization of discrete cosine transform using the distributed arithmetic
1992 · Y.-H. Chan, W.-C. Siu · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 82
A simple processor core design for DCT/IDCT
2000 · Tian-Sheuan Chang, Chin-Sheng Kung, et al. · IEEE Transactions on Circuits and Systems for Video Technology · 77
High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic
2011 · Pramod Kumar Meher, Sang Yoon Park · IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC) · 70
Hardware-Efficient Systolization of DA-Based Calculation of Finite Digital Convolution
2006 · P.K. Meher · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 67
NEDA: a low-power high-performance DCT architecture
2006 · A.M. Shams, A. Chidanandan, et al. · IEEE Transactions on Signal Processing · 67
A new algorithm to compute the DCT and its inverse
1991 · W. Li · IEEE Transactions on Signal Processing · 67
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits
2018 · Honglan Jiang, Leibo Liu, et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 61
Low-Area and High-Throughput Architecture for an Adaptive Filter Using Distributed Arithmetic
2013 · M. Surya Prakash, Rafi Ahamed Shaik · IEEE Transactions on Circuits & Systems II Express Briefs · 61
Area-Efficient FIR Filter Design on FPGAs using Distributed Arithmetic
2006 · Patrick Longa, Ali Miri · IEEE International Symposium on Signal Processing and Information Technology (ISSPIT) · 61
Works count: 1,507
Citation count: 11,470
Year
Topic
Type