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Keyword

full adder

Description: A full adder is a digital logic circuit that adds two binary bits and an input carry, producing a sum and output carry.
OpenAlex ID: keywords/full-adder
Logical devices implemented using quantum cellular automata
1994 · P. Douglas Tougaw, Craig S. Lent · Journal of Applied Physics · 1,277
QCADesigner: A Rapid Design and Simulation Tool for Quantum-Dot Cellular Automata
2004 · K. Walus, T.J. Dysart, et al. · IEEE Transactions on Nanotechnology · 1,107
Low-power logic styles: CMOS versus pass-transistor logic
1997 · R. Zimmermann, W. Fichtner · IEEE Journal of Solid-State Circuits · 940
Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies
2013 · Shahar Kvatinsky, Guy Satat, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 679
CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
2009 · Sheng Lin, Yong-Bin Kim, et al. · IEEE Transactions on Nanotechnology · 605
Programmable nanowire circuits for nanoprocessors
2011 · Hao Yan, Hwan Sung Choe, et al. · Nature · 529
Current-driven magnetic domain-wall logic
2020 · Zhaochu Luo, Aleš Hrabec, et al. · Nature · 452
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Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
2006 · Sumeer Goel, Ashok Kumar, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 448
Architectures for molecular electronic computers. I. Logic structures and an adder designed from molecular electronic diodes
2000 · J.C. Ellenbogen, J.C. Love · Proceedings of the IEEE · 408
IMPACT: IMPrecise adders for low-power approximate computing
2011 · Vaibhav Gupta, Debabrata Mohapatra, et al. · IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) · 402
A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
2005 · Chip-Hong Chang, Jiangmin Gu, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 374
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CMOS Full-Adders for Energy-Efficient Arithmetic Applications
2010 · Mariano Aguirre-Hernandez, Monico Linares-Aranda · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 351
Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions
2008 · Shoun Matsunaga, Jun Hayakawa, et al. · Applied Physics Express · 345
Low-voltage low-power CMOS full adder
2001 · D. Radhakrishnan · IEE Proceedings - Circuits Devices and Systems · 320
Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates
2002 · Hung Tien Bui, Yuke Wang, et al. · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 319
A Molecular Full-Adder and Full-Subtractor, an Additional Step toward a Moleculator
2006 · David Margulies, Galina Melman, et al. · Journal of the American Chemical Society · 309
IMPACT: imprecise adders for low-power approximate computing
2011 · Vaibhav Gupta, Debabrata Mohapatra, et al. · 306
Approximate XOR/XNOR-based adders for inexact computing
2013 · Zhixi Yang, Ajaypat Jain, et al. · IEEE International Conference on Nanotechnology (IEEE-NANO) · 271
Low-Power and Fast Full Adder by Exploring New XOR and XNOR Gates
2018 · Hamed Naseri, Somayeh Timarchi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 270
DNA Logic Gates
2004 · Akimitsu Okamoto, Kazuo Tanaka, et al. · Journal of the American Chemical Society · 267
Large-scale design of robust genetic circuits with multiple inputs and outputs for mammalian cells
2017 · Benjamin H Weinberg, N T Hang Pham, et al. · Nature Biotechnology · 265
MRL — Memristor Ratioed Logic
2012 · Shahar Kvatinsky, Nimrod Wald, et al. · International Workshop on Cellular Nanoscale Networks and their Applications (CNNA) · 256
Circuit techniques for CMOS low-power high-performance multipliers
1996 · I.S. Abu-Khater, A. Bellaouar, et al. · IEEE Journal of Solid-State Circuits · 255
A new quantum-dot cellular automata full-adder
2010 · Keivan Navi, Razieh Farazkish, et al. · Microelectronics Journal · 247
Fault-Tolerant Reversible Circuits
2006 · Behrooz Parhami · 246
Works count: 4,190
Citation count: 49,280
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