Work

Pattern generation for verification of VHDL behavioral-level design

Year: 2003

Type: conference-paper

Source: AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)

DOI: 10.1109/apasic.1999.824096

Authors: Jong-Hyeon Kim, Seung-Kyu Park, Young-Ho Seo, Dong-Wook Kim

Institution: Kwangwoon University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W1850310409

FWCI: 0.229

Cites: 8

Cited by: 1

Related to: 10