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A high-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects

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Year: 2002
Type: conference-paper
Source: Symposium on VLSI Technology
DOI: 10.1109/vlsit.1998.689182
Authors: L. Su, R. Schulz, J. Adkisson, K. Beyer, G. Biery, W. Cote, E. Crabbe, D. Edelstein, J. Ellis-Monaghan, E. Eld, D. Foster, R. Gehres, R. Goldblatt, N. Greco, C. Guenther, J. Heidenreich, J. Herman, D. Kiesling, L. Lin, S.-H. Lo, J. McKenna, C. Megivern, H. Ng, J. Oberschmidt, A. Ray, N. Rohrer, K. Tallman, T. Wagner, B. Davari
Institution: IBM (United States)
Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
SDG: Industry, innovation and infrastructure

Open Access status: closed
OpenAlex ID: W1892460909
FWCI: 4.267
Cites: 3
Cited by: 26
Related to: 10
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