Work

An electrical technique for determining MOSFET gate length reduction due to process micro-loading effects in advanced CMOS technology

Year: 2002

Type: conference-paper

Source: IEEE International Conference on Microelectronic Test Structures (ICMTS)

DOI: 10.1109/icmts.2000.844417

Authors: Chunbo Liu, J. Ma, Jeong Choi

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W1900358676

FWCI: 0.375

Cites: 3

Cited by: 2

Related to: 10