A third order delta-sigma modulator employing shared opamp technique for WCDMA on 0.18um CMOS
Year: 2011
Type: article
Abstract: Analog to digital converter is a vital component in a wireless transceiver. High order loop filter is one of conventional approach to attain high resolution delta-sigma modulator which required one opamp for each integrator. A third orders delta-sigma modulator (DSM) has been designed utilizing shared opamp technique to reduce number of opamp required and decrease power consumption. Moreover, this architecture has relaxed comparator speed which is appropriate for wireless applications. First and second stages are sharing one opamp in integration and sampling phase. The proposed circuit has been designed on TSMC 0.18um CMOS technology. 2MHz Bandwidth, 50dB Peak SQNR, which is suitable for WCDMA, have been achieved.
Source: IEICE Electronics Express
DOI: 10.1587/elex.8.1204
Institution: Kyushu University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W1994745786