Work

Part 1: VLSI implementation of an optimised hierarchical multiplier

Year: 1984

Type: article

Source: IEE Proceedings G (Electronic Circuits and Systems)

DOI: 10.1049/ip-g-1.1984.0011

Authors: H.C. Yung, C.R. Allen

Institution: Newcastle University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W1996807822

FWCI:

Cites: 7

Cited by: 4

Related to: 10